99 asic engineer jobs at 14 companies in Del Mar, CA
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ASIC Methodology Engineer
Santa Clara or San Diego
$153k-$230k/yr OnsiteFull Time
3+ YOEMS/PhD or BS with experience in ASIC/VLSI design flows; strong Python skills; hands-on STA experience with PrimeTime or Tempus; problem-solving and analytics; version control experience preferred.
Python, PrimeTime, Tempus, Perforce, Git, GPT, Liama
1w
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Principal ASIC Design Engineer - Terawave
San Diego or Kent or Austin or California
$269k-$377k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
10+ YOEBS/MS in Electrical Engineering or related,10+ years experience in complex SoC/ASIC design and verification,Verilog/System Verilog,ARM integration,DSP and high-speed interfaces,post-silicon bring-up experience.
Verilog, System Verilog, Matlab, SystemC, C, FPGA, AXI, PCIE, ARM
2mo
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ASIC Design Engineer I, Satellite Communications
San Diego, California, United States
$123k-$170k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering; 2+ years in digital logic/DSP design; RTL implementation; DSP algorithms optimization.
MATLAB, RTL, UVM, SystemC, DPI-C, Verilog, VHDL
3mo
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Senior Principal Engineer Digital ASIC Design/Manager
San Diego, California, United States
$214k-$348k/yr OnsiteFull Time
15+ YOEBS or MS in Electrical Engineering; 15 years in Digital ASIC design; leadership; cross-functional collaboration; RTL/verification; experience with mixed-signal interfaces is a plus.
Verilog, SystemVerilog, LINT, LEC, RDC/CDC, SDF, Genus, Conformal, Innovus, Spyglass Lint, TetraMax, Xcelium, Cadence, Synopsys PrimeTime, VCS, UGV, UVM
1w
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ASIC Digital Design Engineer Lead
San Diego, California, United States
OnsiteFull Time
Senior-level engineering experience leading technical engagements with silicon suppliers to define, develop, and productize display digital designs across multifunctional teams.
2mo
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Principal Engineer, ASIC/VLSI Synthesis and Design
San Diego, California, United States
$160k-$237k/yr OnsiteFull Time
5+ YOE10-15 years in ASIC implementation and synthesis; strong RTL-to-GDSII flow; experience with UPF, ECOs, STA; 5-10 years on advanced nodes; scripting.
Fusion Compiler, Conformal ECO, Conformal Low Power, UPF, Scripting (Tcl, Python)
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Electrical Engineer, ASIC Program Lead-CA
San Diego, California, United States
$160k-$200k/yr OnsiteFull Time
12+ YOE12+ years experience with end-to-end custom ASIC/SoC development, mixed-signal and analog front-end expertise, strong digital design and verification experience, EE degree (BS required, MS preferred), lab debugging skills, and cross-functional collaboration.
Verilog, VHDL, SystemVerilog, UVM, EDA tools, Python, MATLAB, C/C++, Tcl, oscilloscopes, logic analyzers, spectrum analyzers, signal generators, precision measurement equipment, custom test fixtures
3d
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AI/ML driven ASIC Design and Implementation Automation Engineer
San Diego, California, United States
$118k-$162k/yr OnsiteFull Time
0+ YOEBS or MS in a related technical discipline, strong Python or C++ development, AI/ML optimization experience, data structures and algorithms, Unix/Linux, Git, debugging, and strong communication skills.
Python, C++, Unix, Linux, Git, BitBucket, DesignSync, Make, Splunk, Jenkins, LSF, CI/CD, EDA tools, VLSI CAD SW
3mo
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ASIC High Speed AMS Technical Leader
Carlsbad, California, United States
OnsiteFull Time
12+ YOELead analog/mixed-signal design for high-speed optical driver ICs; coordinate full-chip specs, design, verification; mentor engineers; collaborate across teams.
Cadence Virtuoso, Spectre, Caliber, SystemVerilog, Verilog-AMS, Python, C
4w
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Verification Engineer
San Jose or San Diego or Austin or Longmont
$124k-$213k/yr HybridFull Time
Experience in IP/ASIC/FPGA verification using UVM, Verilog/SystemVerilog, scripting (Python/Perl), and developing test plans and regression suites; bachelor’s or master’s in computer or electrical engineering.
UVM, Verilog, System Verilog, Python, Perl, PCIe, CXL, NVMe, Ethernet, HLS
2w
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Staff Systems Engineer
Carlsbad, California, United States
$134k-$175k/yr OnsiteFull Time
3+ YOEExperience validating ASICs for optical modules and data center applications, high-speed serial interfaces and re-timer design, signal integrity and DSP expertise, test automation, PCB/simulation (ADS, Cadence, Matlab), BS/MS/PhD with relevant years of experience.
ADS, Cadence, Matlab, PCIe, Ethernet, SerDes
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GPU Design Verification Engineer
San Diego, California, United States
$180k-$301k/yr OnsiteFull Time
10+ YOEMS/PhD or equivalent,10+ years ASIC design verification experience,SystemVerilog/UVM,constrained random,functional coverage,hw/sw co-simulation,emulation,strong debugging and GPU architecture knowledge.
SystemVerilog, UVM, emulation
1w
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Senior TPU Design Engineer, Silicon
Mountain View or San Diego
$163k-$236k/yr OnsiteFull Time
8+ YOE4+ MgmtBachelor's in EE/CE/CS or equivalent,8+ years RTL design with Verilog/System Verilog,4+ years leading IP/SoC teams,ARM/ASIC experience,EM/FPGA bring-up and strong communication.
Verilog, System Verilog, ARM, FPGA
1mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
3w
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Software Architect
Carlsbad or Germantown
$165k-$307k/yr HybridFull Time
8+ YOEMinimum 8+ years related software experience (varies by degree), expertise in embedded and distributed systems, domain modeling, microservices, edge device development, object-oriented languages, Kubernetes and containerization.
C, C++, Python, Java, GoLang, Kubernetes, docker compose, FPGA, ASIC, GPUs
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