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Senior ASIC Physical Design Engineer
Laurel, Maryland, United States
$105k-$290k/yr OnsiteFull Time
6+ YOEAssociate’s degree (or equivalent) in a technical field, 6+ years back-end ASIC design, skilled with Cadence back-end tools and Siemens Calibre, able to obtain Interim Secret and Secret clearance, US citizenship required.
Cadence ASIC design tools, Cadence Virtuoso, Siemens Calibre, Siemens ASIC design tools, DRC, DRC+, MCD, LVS
3w
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Associate ASIC/FPGA Design or Verification Engineer
El Segundo or Huntington Beach or Fairfax
$99k-$133k/yr OnsiteFull Time
2+ YOEUS citizenship with ability to obtain U.S. Secret clearance, Bachelor\u0000s degree in a relevant field, experience with ASIC/FPGA design or verification, and RTL experience with Verilog/VHDL/SystemVerilog.
Verilog, VHDL, SystemVerilog, System Verilog Assertions, UVM, Palladium, Make, Perl, Python, svn, cvs, git, Linux, ARM, JESD204C, PCIe, Ethernet
1w
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
5+ YOEBachelor's degree in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency with SystemVerilog/UVM, SV Assertions, revision control (svn/cvs/git), Linux, and waveform/debug tools; ability to obtain U.S. Secret clearance (U.S. citizenship required).
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python, ARM, JESD204C, PCIe, Ethernet
1mo
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Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Dulles, Virginia, United States
$114k-$171k/yr OnsiteFull Time
5+ YOEBS with 5+ yrs or MS with 3+ yrs (Level 3) or PhD with 1+ yrs; SCI clearance; VHDL experience; FPGA design flow expertise; aerospace domain knowledge; leadership experience.
VHDL, RTL, Synthesis, Place and Route, Timing Analysis, Power Analysis, Vivado, QuestaSim, MATLAB, Simulink
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Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Dulles, Virginia, United States
$114k-$213k/yr OnsiteFull Time
5+ YOERequires active Top-Secret/SCI clearance, VHDL FPGA/ASIC design and verification experience, proficiency in FPGA design flow (synthesis, place and route, static timing), and proven architecture or team leadership; degree with relevant years of experience required.
VHDL, SystemVerilog, MATLAB, Simulink, Vivado, Quartus, QuestaSim, Xilinx, Microchip RTG4, Oscilloscope, Logic analyzer
3mo
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Digital Hardware Engineer
Washington, D.C., District of Columbia, United States
$115k-$189k/yr OnsiteFull Time
5+ YOEBachelor's in electrical/computer engineering, physics, 5+ years exp, HDL (VHDL/Verilog); FPGA/ASIC exp; Altera/Xilinx tools; FPGA/ASIC testbench; TS/SCI clearance preferred.
HDL, VHDL, Verilog, Vivado, Quartus, Synplify, ModelSim, Verdi, RS232, RS422, UART, SPI, I2C, DSP
2w
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Hardware Design Engineer
Fort Meade, Maryland, United States
OnsiteFull Time
7+ YOETS/SCI w/Poly required; 7+ years hardware design experience or Bachelor's in EE/CE (or 5 additional years experience), PCB layout and schematic experience, ASIC/FPGA place-and-route experience, technical leadership and strong communication skills.
ASIC, FPGA, PCB, P&R, schematic capture
3w
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PCB Layout Hardware Design Engineer (GA-2/3)
Annapolis Junction or Fort Meade
$220k-$280k/yr OnsiteFull Time
7+ YOETS/SCI with polygraph required; 7+ years experience in integrated circuit/microelectronic design or reverse engineering; PCB layout, schematic capture, HDI, ASIC/FPGA P&R experience; bachelor\u0002s in EE/CE (or 5 yrs additional experience).
ASIC, FPGA, place-and-route (P&R), CDES, computer-aided design
3mo
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Digital Hardware Engineer
Washington, District of Columbia, United States
$115k-$189k/yr OnsiteFull Time
5+ YOEBachelor’s in electrical/computer engineering, physics, or related field; 5+ years of experience; HDL (VHDL/Verilog); FPGA/ASIC experience; bus interfaces (RS232/RS422/UART/SPI/I2C); ability to create architectural diagrams; TS/SCI clearance and U.S. citizenship.
HDL, VHDL, Verilog, Vivado, Quartus, Synplify, ModelSim, Verdi, RS232, RS422, UART, SPI, I2C
3mo
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Software Engineer 0
Fort Meade, Maryland, United States
OnsiteFull Time
0+ YOEBachelor of Science plus 0-6 years of experience; TS/SCI with Polygraph; Windows/C# development preferred; Java OK; FPGA/ASIC knowledge helpful.
Windows, C#, Java, FPGA, ASIC
2mo
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Circuit Design Engineer
Annapolis Junction or Catonsville
$99k-$225k/yr OnsiteFull Time
10+ YOETen+ years ASIC design experience; TS/SCI with poly; BS in EE/SE/CE/CS or MS with relevant experience; RTL, FPGA, Python/Verilog/C/C++, etc.
Python, Verilog, C, C++, Bash, Java, RTL, FPGAs
1mo
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ASICS Electronics Engineer (Adelphi, MD, Maryland, United States)
Adelphi, Maryland, United States
$104k-$155k/yr OnsiteFull Time
PhD-level candidate with ASIC/FPGA front-end design experience, lab RF hardware familiarity, Synopsys/Cadence design flow experience, GDSII completion, and ability to obtain a DoD/DoW security clearance.
PSpice, FEKO, Ansys, Synopsys, Cadence, MOSIS, GF, GDSII, FPGAs, ASICs
2mo
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Circuit Design Engineer
Annapolis Junction or Catonsville
$99k-$225k/yr OnsiteFull Time
10+ YOEExperience with Python, Verilog, C, C++, Bash, or Java; RTL/RTL design and timing analysis; FPGA experience; TS/SCI clearance with polygraph; Bachelor's in EE/SE/CE/CS with 10+ yrs or Master's with 5+ yrs designing ASICs.
Python, Verilog, C, C++, Bash, Java, RTL, FPGAs
3w
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Functional Verification Applications Engineer - Boston/Baltimore/Raleigh - Job Detail | Careers Marketplace - Siemens
Boston or Burlington or Marlborough or Cary or Baltimore or Raleigh
$125k-$251k/yr HybridFull Time
3+ YOEBachelor's in Engineering/CS (or equivalent) with 3+ years; expertise in ASIC & FPGA design and verification, advanced verification methodologies; coding in Verilog/VHDL/SystemVerilog, UVM, PSL/SVA; familiarity with EDA tools, Verification IP, Formal, Emulation; US citizenship required.
Verilog, VHDL, SystemVerilog, UVM, PSL/SVA, Verification IP, Formal, Emulation, EDA, APIs
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