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62 asic engineer jobs at 15 companies in Riverside, CA

3mo
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ASIC Design Engineer
Irvine or Andover
$108k-$173k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
6+ YOEBachelor's in Electrical Engineering with 8+ years of related experience or Master's in Electrical Engineering with 6+ years of related experience; ASIC implementation, synthesis, DFT, floorplanning, place & route, clocking, power planning and analysis, timing closure, signal integrity, physical design checks.
EDA tools, Synthesis tools, Place and Route (P&R) tools, Floorplanning tools, Clocking/Timing analysis tools, Power analysis tools
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1mo
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Sr. ASIC DFT Engineer (Silicon)
Irvine or Austin or Sunnyvale
$125k-$150k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
5+ YOEBachelor's in engineering or physics; 5+ years in DFT/semiconductor testing; strong ASIC/DFT/ATE expertise.
Siemens Tessent, ATPG, Teradyne, Advantest, Perl, Python, Tcl, C++, IEEE 1500, IEEE 1687, IST
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2w
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Senior ASIC Package Design Engineer
Los Angeles or United States
$180k-$260k/yr RemoteFull Time
K2 Space
K2 Space: Develops high-power satellite platforms for heavy-lift launch vehicles.
5+ YOEBachelor's in engineering, 5+ years ASIC package design experience (FC-BGA), expertise in substrate technologies, SI/PI and thermal management, experience with OSATs and package qualification.
SIWave, HFSS, ADS
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3w
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Associate ASIC/FPGA Design or Verification Engineer
El Segundo or Huntington Beach or Fairfax
$99k-$133k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designs and manufactures aircraft, defense systems, and space technology.
2+ YOEUS citizenship with ability to obtain U.S. Secret clearance, Bachelor\u0000s degree in a relevant field, experience with ASIC/FPGA design or verification, and RTL experience with Verilog/VHDL/SystemVerilog.
Verilog, VHDL, SystemVerilog, System Verilog Assertions, UVM, Palladium, Make, Perl, Python, svn, cvs, git, Linux, ARM, JESD204C, PCIe, Ethernet
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1mo
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Senior ASIC Design Verification Engineer - Terawave
Los Angeles or Seattle or California or Washington or Texas or United States
$230k-$323k/yr RemoteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
8+ YOEBS/MS in EE/CE, 8+ years ASIC/SoC verification experience, deep System Verilog and UVM expertise, verification planning, coverage closure, RTL/debugging, cross-functional collaboration.
System Verilog, UVM, RTL
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2mo
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ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal
El Segundo or Huntington Beach
OnsiteFull Time
Boeing
BoeingNYSE: BA: Designing and manufacturing commercial aircraft and defense systems.
5+ YOEBachelor's degree in engineering or related field; experience in ASIC/FPGA verification; SystemVerilog/UVM; HDL proficiency; testbenches, coverage models, and regression testing experience.
SystemVerilog, UVM, HDL, Verilog, Python, Make, Perl, Git, SV Assertions
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1w
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ASIC/FPGA Verification Engineer - (Associate, Experienced, or Lead) - SoCal
El Segundo or Huntington Beach
$86k-$171k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designs and manufactures commercial airplanes, defense systems, and space technology.
2+ YOEBachelor's degree or equivalent, ASIC/FPGA verification experience using SystemVerilog/UVM, coverage and regression development, testbench design, revision control (svn/cvs/git), and Linux proficiency.
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python, JESD204C, PCIe, Ethernet
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1mo
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Senior ASIC/FPGA Verification Engineer (Onsite)
El Segundo or Fullerton
$96k-$182k/yr OnsiteFull Time
RTX
RTXNYSE: RTX: RTX provides advanced aerospace and defense systems and services.
5+ YOEActive transferable U.S. SECRET clearance and U.S. citizenship, STEM degree (BS or advanced) with 5+ years (BS) or 3+ years (advanced) experience, RTL verification using VHDL/Verilog/SystemVerilog, testbench and coverage, and revision control (Git/Subversion).
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
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3w
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Sr. ASIC Design Verification Engineer, Amazon Leo
Sunnyvale or San Diego or Los Angeles County
$159k-$248k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
7+ YOEBachelor's in CS/CE/EE, 7+ years verification experience (communications preferred), 5+ years with UVM and C/C++ and scripting, familiarity with Matlab and formal verification preferred; must meet U.S. export-control eligibility.
UVM, SystemC, DPI-C, Matlab, C/C++, FPGA
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1mo
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Senior Principal Engineer, Architecture ASIC / System
Toronto or Ottawa or Burlington or Irvine or Morrisville or Santa Clara or Westborough
$192k-$255k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
14+ YOESenior architect with 14+ years in system architecture for SoC; expertise in interconnects, memory hierarchies, power management, security; strong technical leadership.
IP evaluation, IP block, SoC architecture
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1w
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Senior Principal Digital Engineer
Los Angeles, California, United States
$156k-$235k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Designs and manufactures advanced aerospace and defense systems.
8+ YOEU.S. citizen with active Secret clearance. Requires extensive high-speed digital design and verification experience, FPGA/SoC/ASIC implementation skills (VHDL/Verilog), and STEM degree with significant experience.
VHDL, Verilog, System Verilog, UVM, MATLAB, Simulink, FPGA, SoC, ASIC, Electronic Hardware-In-Loop
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Digital Design Principal Engineer/Manager
Irvine, California, United States
$190k-$225k/yr OnsiteFull Time
InnoPhase
InnoPhase: Designing energy-efficient semiconductor solutions for 5G cellular networks.
20+ YOE20+ years FPGA/SoC development with leadership experience; MS in Electrical Engineering; deep Verilog/SystemVerilog expertise; FPGA/ASIC implementation and packet processing experience; scripting in C/C++, Perl, Tcl, Python.
Verilog, SystemVerilog, AMD (Xilinx Vivado), C, C++, Perl, Tcl, Python, Claude Code, Copilot
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1mo
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FPGA Verification Engineer, Air Vehicles
Costa Mesa, California, United States
$123k-$171k/yr OnsiteFull Time
Anduril Industries
Anduril Industries: Defense technology building autonomous military hardware and software.
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog, UVM, SVA, industry simulators, Git, Linux; eligible to obtain U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, Python, Tcl, Makefile, SVUnit, Nix
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Principal Electronics Design Engineer
Garden Grove, California, United States
$140k-$190k/yr OnsiteFull Time
FEI-Zyfer
FEI-Zyfer: Manufacturer of precision GPS time and frequency systems.
10+ YOEBSEE and 10+ years electronic systems design experience, FPGA and embedded microprocessor design, GNSS/M-Code/SAASM, Ethernet/PTP, schematic capture, team leadership, ability to obtain secret clearance and U.S. citizenship.
FPGA, PWB, GNSS, M-Code, SAASM, Ethernet, Precision Time Protocol (PTP), SoC, SoM, ASIC
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1w
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
Hikinex
Hikinex: Provider of outsourced sales and administrative business solutions.
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
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3mo
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Principal Engineer Digital Design
Irvine or California or Dallas or Texas
$164k-$241k/yr HybridFull Time
Infineon Technologies
Infineon TechnologiesFrankfurt Stock Exchange: IFX: Designs and manufactures semiconductors for power and IoT systems.
12+ YOEBachelor's degree in EE/Computer Engineering, 12+ years RTL design experience (Verilog/System Verilog), DSP algorithm implementation, fixed-point math, MATLAB/C/C++, FPGA/ASIC experience, and familiarity with EDA tools (Synopsys Design Compiler, Cadence).
Verilog, System Verilog, HDL, MATLAB, Simulink, C, C++, Synopsys Design Compiler, Cadence
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1w
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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2mo
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Embedded Software/Firmware Engineer
Long Beach, California, United States
OnsiteFull Time
SpinLaunch
SpinLaunch: Develops kinetic launch systems and broadband satellite constellations.
Bachelor's or master's in CS/EE/related; embedded software for space; ARM; C/C++/Rust; spacecraft protocols; debugging; read schematics; strong communication.
ARM, C/C++, Rust, JTAG, GDB, logic analyzers, Ethernet, CAN, UART, SPI, I2C, FPGA, ASIC, Python
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