8 asic engineer jobs at 5 companies in Roebling, NJ
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ASIC & FPGA Design Engineer Stf - E4
Littleton or Sunnyvale or Denver or Boulder or Louisville or Highlands Ranch or King of Prussia
$136k-$252k/yr OnsiteFull Time
Bachelor of Science in Electrical Engineering or related field, or equivalent experience; ASIC/FPGA design, debugging, or verification experience; active Top Secret clearance and U.S. citizenship required.
ASIC, FPGA, Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
1w
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ASIC & FPGA Design Engineer Sr - E3
Littleton or Sunnyvale or Highlands Ranch or King of Prussia
$110k-$205k/yr OnsiteFull Time
Bachelor's degree in computer or electrical engineering or equivalent; ASIC/FPGA verification experience; VHDL, Verilog, or SystemVerilog; UVM experience; ability to obtain Secret clearance preferred.
VHDL, Verilog, SystemVerilog, UVM, AI
3w
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Senior Engineer, Physical Design Engineering (ASIC)
Somerset County or Wilmington
$117k-$161k/yr OnsiteFull Time
5+ YOEExpertise in ASIC/SoC physical design, floorplanning, P&R, timing closure, physical verification, scripting (TCL/Python), and cross-functional collaboration; 5+ years experience preferred.
Cadence, TCL, Python
3mo
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FPGA Engineer
Exton, Pennsylvania, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering; 2+ years FPGA/ASIC in regulated environments; proficient in Verilog/VHDL; Xilinx Vivado; DO-254 familiarity; hardware debugging; cross-functional collaboration
Verilog, VHDL, Xilinx Vivado, RTL simulation, ModelSim/Questa, DO-254 knowledge, I2C, SPI, JTAG, Ethernet, PCIe
3mo
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Senior Engineer, Digital Design Engineering
Somerset, New Jersey, United States
$127k-$175k/yr HybridFull Time
2+ YOEMaster’s degree in Electrical/Electronic/Computer Engineering or related field; 2+ years in digital design/mixed-signal verification; experience with RTL, Verilog/SystemVerilog, and ASIC/FPGA design flows.
Verilog, SystemVerilog, Cadence, Synthesis, CDC, Verifications tools
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FPGA Engineer - Control Systems
Princeton, New Jersey, United States
$150k-$235k/yr OnsiteFull Time
Experienced in FPGA/ASIC digital logic design and verification, RTL and low-latency firmware for multi-domain clock systems; familiarity with Xilinx/AMD RFSoC platforms preferred.
RTL, FPGAs, ASICs, Xilinx, AMD, RFSoC
1d
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Engineering Planner (Project Engineer)
King of Prussia, Pennsylvania, United States
$79k-$147k/yr OnsiteFull Time
FPGA or ASIC design coursework or experience, HDL programming with VHDL, Verilog, or SystemVerilog, and ability to obtain and maintain a DoD Secret clearance; US citizenship required.
Microsoft Project, Jira, VHDL, Verilog, SystemVerilog
3mo
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Principal Access Network Systems Engineer
Philadelphia, Pennsylvania, United States
HybridFull Time
10+ YOE Lead strategic architecture and system design for next-generation access and transport technologies; evaluate hardware/software architectures; design RF/optical networks; develop PoCs; collaborate with partners.
FPGA, ASIC, Python, RF, Optical networking, WiFi, O-RAN