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2 asic engineer jobs at 1 company in Union, IL

2mo
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Principal/ Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$224k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Designs and manufactures advanced aerospace and defense systems.
5+ YOEUS citizen able to obtain Top Secret/SCI; Bachelor's in EE/CE (or similar); 5+ years FPGA/ASIC design (8+ for senior); VHDL/Verilog, HLS (Xilinx Vivado HLS/Mentor Catapult), Python/C/C++, DSP and FPGA toolchain experience.
VHDL, Verilog, Xilinx Vivado HLS, Mentor Catapult HLS, C++, Python, C, Electronic Design Automation (EDA) Tools, Mentor Graphics ModelSim, QuestaSim, Synplify, Xilinx ISE, Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder, SystemVerilog, Universal Verification Methodology (UVM), MATLAB, Simulink, AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, GIT, SVN, ClearCase, DOORS, Jira, Rally, ClearQuest, Signal Generators, Logic Analyzers, Digital Oscilloscopes
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2mo
Save
Mark Applied
Hide
Principal/ Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$224k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
5+ YOEUS citizen able to obtain Top Secret/SCI clearance; B.S. in EE/CE or similar plus 5+ years FPGA/ASIC design (8+ for senior level). Requires VHDL/Verilog, HLS (Vivado/Mentor Catapult), timing closure, DSP knowledge, Python/C/C++, testbench and FPGA design flow experience.
VHDL, Verilog, Xilinx Vivado HLS, Mentor Catapult HLS, C++, Python, C, MATLAB, Simulink, Mentor Graphics ModelSim, QuestaSim, Synplify, Xilinx ISE, Xilinx Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder, SystemVerilog, Universal Verification Methodology (UVM), GIT, SVN, ClearCase, DOORS, Jira, Rally, ClearQuest, AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet
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