183 cmos jobs at 96 companies in California
1mo
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Principal Design Engineer CMOS Design Engineer – RF / Mixed-Signal
Manhattan Beach, California, United States
$114k-$171k/yr OnsiteFull Time
5+ YOEBachelor's in EE (or related) with 5+ years (masters 3+, PhD 0–2); transistor-level CMOS RF/mixed-signal design experience; SPICE and Cadence proficiency; PVT/Monte Carlo verification; strong communication.
Cadence Virtuoso, SPICE, VNA, spectrum analyzer, oscilloscope, probe station
1w
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Senior CMOS Test and Validation Lead, Analog Mixed-Signal, Raxium
Fremont, California, United States
$240k-$333k/yr OnsiteFull Time
10+ YOE2+ Mgmt10+ years test/post-silicon validation experience with CMOS, 2+ years technical leadership, Bachelor's in EE/CE or equivalent, BSM/PhD preferred, EM lab automation and data analysis experience.
Advantest V93000, Teradyne UltraFLEX, High-bandwidth Oscilloscopes, Spectrum Analyzers, BERTs, VNAs, C++, Python, MIPI
4w
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Senior Field Application Engineer - CMOS Image Sensor
California or United States or North America
RemoteFull Time
5+ YOEMaster's degree in relevant field, 5+ years industry experience in semiconductors/CIS, TCAD/process/device simulation experience, CMOS image sensor expertise, strong communication and problem-solving, Python scripting experience.
TCAD, EDA, Silvaco, Python, JMP, Minitab, SalesForce CRM
1w
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Staff Analogue Designer, CMOS Modelling
Oxford or College Park or California or Colorado or Massachusetts or Tennessee or Washington or Italy or Korea or Sweden or Switzerland or Canada or United Kingdom
HybridFull Time
10+ YOERequires 10+ years of analogue and mixed-signal design and modelling experience, expert Verilog-A/AMS, real-number modelling, mathematical modelling, Cadence flows, and SystemVerilog, MATLAB, or Python/NumPy.
Verilog-A, Verilog-AMS, SystemVerilog, MATLAB, Python, NumPy, Cadence AMS Designer, Xcelium, Spectre, Virtuoso
2d
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Sr. Device Integration and Innovation Engineering (Logic and/or Memory)
Santa Clara, California, United States
$163k-$224k/yr OnsiteFull Time
10+ YOEBachelor's degree and 10–15 years of experience in logic or memory technology, CMOS transistor formation, process engineering, and leading complex R&D projects.
CMOS, NAND, DRAM, FEOL, MEOL, BEOL
1w
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Director, Analog/Mixed-Signal Design
San Jose, California, United States
$240k-$300k/yr OnsiteFull Time
12+ YOERequires a B.S. in Electrical Engineering, 12+ years of analog/mixed-signal design experience, and production tapeouts in advanced FinFET CMOS nodes; M.S. or Ph.D. preferred.
FinFET, CMOS, EDA
5d
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Senior Semiconductor Product Engineer
San Jose or Maynard or Holmdel
$155k-$225k/yr HybridFull Time
MS or PhD in electrical or related engineering, semiconductor foundry or fabless experience, NPI-to-production transition experience, advanced CMOS knowledge, DFM, yield analysis, and programming skills.
JMP, Python, Advantest 93k ATE, ATE, WAT, CMOS, DFT, AI
1w
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Sr HBM Design Architect, PhD NCG
Richardson or Folsom
$97k-$205k/yr OnsiteFull Time
NCG PhD or NCG Master's degree with relevant prior experience; expertise in CMOS circuit design, device physics, schematic simulation, and DRAM or mixed-signal design preferred.
Finesim, Hspice, DRAM, DDR, LPDDR, HBM, CIM, CMOS
3d
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Senior Staff Analog Engineer
San Jose, California, United States
$185k-$235k/yr HybridFull Time
10+ YOEMSEE and 10+ years in analog and mixed-signal design; expertise in CMOS, motor drivers, power management, high-voltage BCD, AMS verification, EDA tools, and Cadence.
CMOS, ADC, DAC, EDA, Cadence, FPGAs, DFT
2d
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Sr. Device Integration and Innovation Engineering (Logic and/or Memory)
Santa Clara, California, United States
$163k-$224k/yr OnsiteFull Time
10+ YOEBachelor's degree and 10–15 years of experience in process engineering, CMOS logic transistor formation, and Logic or Memory technology; expertise leading complex engineering projects and R&D initiatives.
CMOS, NAND, DRAM
3d
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Serdes Analog Mixed-Signal Design Expert
San Jose, California, United States
$189k-$324k/yr HybridFull Time
Expertise in analog/mixed-signal circuit design, 200G+ CMOS transceivers, high-speed electrical or optical PHYs, circuit optimization, silicon productization, and a Ph.D. or M.S. in electrical engineering or related field.
CMOS, CMOS PDKs, DAC, ADC, PLL, CTLE, ESD
3d
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Analog IC Design Engineer, AMS
Boston or Mountain View
$190k-$230k/yr HybridFull Time
5+ YOEMS with 8+ years or Ph.D. with 5+ years designing analog and mixed-signal circuits; CMOS expertise, Cadence Design Environment experience, lab testing experience, and cross-functional collaboration skills.
Cadence Design Environment, CMOS, MZM
2d
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Senior Principal RFIC Design Engineer
San Jose or Irvine
$171k-$227k/yr OnsiteFull Time
Hands-on RF and analog IC design experience, CMOS technology expertise at 40nm or below, successful design releases and production, EDA tool knowledge, layout experience, and a relevant BS, MS, or PhD.
Cadence, Mentor, Siemens, Ansys, CMOS, RFIC, EDA
3d
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Analog Layout Designer (TEMPORARY POSITION)
Burlington or New York City or California
$100/hr HybridTemporary
Expertise in precision analog circuit layout, CMOS design principles, low- and high-voltage designs, parasitic extraction, LVS, DRC, and Cadence EDA tools; must be authorized to work in the US without sponsorship.
Cadence EDA, TSMC 130nm BCD, CMOS, LVS, DRC
4w
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Localization Copy Editor
El Segundo, California, United States
$29-$35/hr HybridFull Time
2+ YOEWriting and editing in-game text and voiceover scripts, updating localization docs, 2+ years game-related experience and 3+ years professional writing preferred, familiarity with CMoS and CAT tools, strong grammar and communication.
CAT tool, text tool, termbase, CMoS
5d
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Senior Mixed Signal Design Engineer
Goleta, California, United States
$96k-$182k/yr OnsiteFull Time
5+ YOESTEM degree with 5+ years of relevant experience or advanced degree with 3+ years; full-custom CMOS IC design, Cadence, Mentor Graphics, MATLAB, Python, UNIX, SystemVerilog, Verilog-AMS, and RTL experience.
Cadence, Mentor Graphics, MATLAB, Python, UNIX, SystemVerilog, Verilog-AMS, Conformal, Innovus, ROIC, CMOS, IC, ADC, LVDS, PLL, RTL
3mo
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Device Engineer
Phoenix or Santa Clara or Hillsboro
$162k-$228k/yr HybridFull Time
7+ YOEMaster’s degree in Electrical Engineering or Physics with 7+ years in CMOS device engineering; experience in advanced CMOS tech, DOE, data analysis.
2mo
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Principal Engineer-Analog Design
San Jose, California, United States
$73k-$163k/yr OnsiteFull Time
10+ YOEBS in electrical engineering; 10+ years analog design; 5+ years mixed-signal CMOS; Cadence tools; nano CMOS FinFET experience.
Cadence, Circuit simulators
4d
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Associate Director, CMC Program Mgmt
South San Francisco, California, United States
$159k-$207k/yr OnsiteFull Time
12+ YOERequires BA/BS and 12+ years of relevant biotech, pharmaceutical, or CMO CMC experience, or master's degree with 10+ years. Requires CRO/CMO management, GMP experience, and project management expertise.
project management software
2mo
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Managing Director of Specialty Services
Santa Cruz, California, United States
$220k-$290k/yr HybridFull Time
Leadership in healthcare; excellent communication; clinical oversight of specialty services; reports to CMO; bilingual English/Spanish desirable.
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