19 cx manager jobs at 6 companies in Gustine, CA

4d
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Senior Director, CX Product Management
San Jose or Austin or Research Triangle Park or Maitland or Trenton
$280k-$385k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
15+ YOE5+ Mgmt15+ years in product management or related fields, 5+ years senior leadership, experience with hyperscalers/cloud providers, enterprise product/offer development, go-to-market and cross-functional collaboration.
2mo
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CX Spec Specialist
San Francisco or San Jose
$65k-$75k/yr OnsiteFull Time
Insidesource
Insidesource: Sells office furniture and provides workplace design and installation.
2+ YOE2+ years in furniture specification or interior design support; proficiency with CAP Worksheet, CORE, Miro, Microsoft Office, Teams; knowledge of contract furniture systems; strong attention to detail; ability to manage multiple priorities; strong communication and organizational skills.
CAP Worksheet, CORE, Miro, Microsoft Office Suite, Teams
2w
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Communications Manager, CX Product Management & Marketing( Hybrid)
San Jose, California, United States
$165k-$208k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
10+ YOEBachelor's degree, 10+ years in executive/internal/external communications, 5+ years supporting senior executives, 5+ years leading cross-functional communications, strong writing and strategic communications skills, PowerPoint and AI tools experience.
PowerPoint, Video, AI Tools, scripting
1mo
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Senior Principal Product Manager - Cosmos
San Jose, California, United States
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
12+ YOEBachelor's in electrical engineering, computer science, or related field; 12+ years in product management/technical roles in semiconductors or data center infrastructure; proven track in software-silicon product leadership; strong cross-functional collaboration with firmware, drivers, and systems teams.
PCIe, CXL, Ethernet, Redfish, MCTP, PLDM, BIOS/UEFI, BMC, host software, firmware
3w
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Senior Principal Post-Silicon Technical Program Manager, AI Connectivity Products
San Jose, California, United States
$205k-$250k/yr OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
10+ YOE10+ years in semiconductor or systems engineering/program management; post-silicon validation and bring-up experience; strong cross-functional leadership; experience with firmware development, JIRA, Confluence; deep technical knowledge of PCIe, CXL, SerDes, Ethernet, NVMe.
JIRA, Confluence, COSMOS, PCIe, Ethernet, CXL, NVMe, NVLink, SerDes, ATE
1mo
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Principal Sourcing Manager – Silicon Technologies 
San Jose, California, United States
$160k-$200k/yr OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
7+ YOEBachelor's in engineering/supply chain/business, 7+ years technical sourcing/procurement in semiconductor or cloud infrastructure, EM industry knowledge, negotiation and supplier management, strong analytical and financial modeling skills.
CXL, Ethernet, NVLink, PCIe, UALink, COSMOS
1mo
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Senior Pricing Manager
San Jose, California, United States
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
6+ YOEBachelor's degree, 6+ years pricing/strategy/finance/product marketing or analytics experience, strong financial modeling and Excel skills, pricing strategy and discount analysis experience, analytical rigor and cross-functional stakeholder skills.
COSMOS software suite, Microsoft Excel, CXL, Ethernet, NVLink, PCIe, UALink
1w
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Sr. Product Marketing Manager
San Jose, California, United States
$154k-$286k/yr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
8+ YOE8+ years in semiconductor IP/SoC/product marketing or related technical roles; bachelor’s in EE/CE/CS; deep PCIe/CXL knowledge; customer-facing experience; strong communication and product strategy skills.
PCIe, CXL, PCI-SIG, CXL Consortium, NVMe, AMBA, AXI, CHI, CXS, PIPE, IDE, TDISP, FLIT, SerDes
1mo
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Category Sourcing Manager – Capital Equipment & IT (6-Month Contract)
San Jose, California, United States
OnsiteContract
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
6+ YOEBachelor's degree in business/supply chain/engineering required; 6+ years sourcing/procurement experience with hardware or capital equipment; experience with RFQs, negotiations, supplier management and procurement systems (Coupa, Oracle, SAP).
Coupa, Oracle, SAP, COSMOS, CXL, Ethernet, NVLink, PCIe, UALink
1mo
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Hardware Engineering Operations / Manufacturing, AVP
San Jose or China or Asia
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
15+ YOEBachelor's in EE or related, 15+ years hardware manufacturing experience leading cable/PCBA/module/system manufacturing, proven CM/ODM management in Asia, NPI/DFM/mass-ramp expertise, international travel ability.
CXL, Ethernet, NVLink, PCIe, UALink, COSMOS
1mo
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Hardware Engineering Active Electric Cable / Smart Cable Module, AVP
San Jose, California, United States
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
Senior technical leader with proven experience leading engineering development for high-speed electrical interconnect products and cable manufacturing; R&D, product development, roadmap ownership, multidisciplinary team management, and experience with overseas (Asia) contract manufacturers.
CXL, Ethernet, NVLink, PCIe, UALink, COSMOS, FMEA, DFM, DFA
2w
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High Speed Interface Protocols, Principal AE
San Jose, California, United States
$123k-$229k/yr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
10+ YOEMS in EE/CE with 10+ years or BS with 15+ years experience; expertise in high-speed interface protocols (PCIe, CXL, Ethernet, USB, etc.); PHY/controller knowledge; presales/account management, presentation and communication skills.
PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, 112G, AXI, PIPE, Electronic Design Automation (EDA)
3w
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Verification Lead (Lead DV)
San Jose, California, United States
OnsiteFull Time
Lumilens
Lumilens: Designs photonic interconnects for AI supercomputing infrastructure.
10+ YOE10+ years ASIC/SoC verification experience with team leadership; deep UVM/SystemVerilog, hardware-assisted verification (emulation/FPGA), mixed-signal verification, and regression/CI at scale.
UVM, SystemVerilog, Palladium, Veloce, HAPS, Protium, Verilog-AMS, UPF, UCIe, PCIe, CXL, Ethernet, Reed-Solomon, FPGA
6d
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Principal PCIe Subsystem RTL lead
San Jose, California, United States
HybridFull Time
TylSemi
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
10+ YOE10+ years digital IC design experience with ≥4 years PCIe subsystem design/integration; strong SystemVerilog and RTL skills; experience integrating PCIe controller/PHY, PnR constraints, UVM verification, and CXL/PCIe protocols; BS/MS in EE/CE.
SystemVerilog, UVM, PCIe, CXL, SerDes, PnR, PCI-SIG
2mo
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Sr. Director of Product Marketing
San Jose, California, United States
$240k-$300k/yr OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
12+ YOELead GTM strategy for fabric switch and memory controller products; drive positioning, messaging, and competitive strategy; collaborate with engineering, sales, and executive leadership.
PCIe, CXL, UALink, Cosmos software Suite
2mo
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Design Verification Architect
San Jose or United States
$150k-$300k/yr HybridFull Time
TylSemi
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
12+ YOEBachelor's/Master's in EE/CE, 12+ years design verification experience for large SoCs, expertise in SystemVerilog, UVM, Portable Stimulus (PSS), coverage-driven and assertion-based verification, and strong architecture and debugging skills.
SystemVerilog, UVM, Portable Stimulus (PSS), PCIe, DDR, Ethernet, CXL, UCIe
2mo
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SoC Architect
San Jose or United States
$175k-$350k/yr HybridFull Time
TylSemi
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
18+ YOEAdvanced SoC/system architecture expertise (18+ years), degree in EE/CE or related, deep knowledge of high-speed IO and interconnects (UCIe, PCIe, CXL), performance modeling, and strong cross-functional collaboration.
UCIe, PCIe, CXL, UALink, ESUN, Ethernet, DDR, HBM
1mo
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Optical Test Engineering, Senior Director
San Jose, California, United States
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
15+ YOE5+ Mgmt15+ years in optical engineering with 5+ years in test engineering leadership; expertise in optical transceivers, optical-electrical integration, optical characterization, signal integrity, test strategy, standards compliance, and cross-functional leadership.
COSMOS, automated test equipment (ATE), CXL, NVLink, PCIe, UALink, IEEE, IEC, Telcordia
3w
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Design Lead/ Front-End Architect / Datapath Lead
San Jose, California, United States
OnsiteFull Time
Lumilens
Lumilens: Designs photonic interconnects for AI supercomputing infrastructure.
10+ YOE10+ years in digital design and micro-architecture with ownership of high-throughput datapath; strong SystemVerilog/RTL, CDC discipline, UCIe/PCIe/CXL datapath knowledge, timing-aware architecture, and team leadership experience.
SystemVerilog, RTL, SVA, UCIe, PCIe, CXL, CHI, UPF, Reed-Solomon, SerDes