San Jose or Austin or Research Triangle Park or Maitland or Trenton
$280k-$385k/yrHybridFull Time
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
15+ YOE5+ Mgmt15+ years in product management or related fields, 5+ years senior leadership, experience with hyperscalers/cloud providers, enterprise product/offer development, go-to-market and cross-functional collaboration.
Insidesource: Sells office furniture and provides workplace design and installation.
2+ YOE2+ years in furniture specification or interior design support; proficiency with CAP Worksheet, CORE, Miro, Microsoft Office, Teams; knowledge of contract furniture systems; strong attention to detail; ability to manage multiple priorities; strong communication and organizational skills.
CAP Worksheet, CORE, Miro, Microsoft Office Suite, Teams
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
10+ YOEBachelor's degree, 10+ years in executive/internal/external communications, 5+ years supporting senior executives, 5+ years leading cross-functional communications, strong writing and strategic communications skills, PowerPoint and AI tools experience.
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
12+ YOEBachelor's in electrical engineering, computer science, or related field; 12+ years in product management/technical roles in semiconductors or data center infrastructure; proven track in software-silicon product leadership; strong cross-functional collaboration with firmware, drivers, and systems teams.
Senior Principal Post-Silicon Technical Program Manager, AI Connectivity Products
San Jose, California, United States
$205k-$250k/yrOnsiteFull Time
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
10+ YOE10+ years in semiconductor or systems engineering/program management; post-silicon validation and bring-up experience; strong cross-functional leadership; experience with firmware development, JIRA, Confluence; deep technical knowledge of PCIe, CXL, SerDes, Ethernet, NVMe.
JIRA, Confluence, COSMOS, PCIe, Ethernet, CXL, NVMe, NVLink, SerDes, ATE
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
7+ YOEBachelor's in engineering/supply chain/business, 7+ years technical sourcing/procurement in semiconductor or cloud infrastructure, EM industry knowledge, negotiation and supplier management, strong analytical and financial modeling skills.
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
8+ YOE8+ years in semiconductor IP/SoC/product marketing or related technical roles; bachelor’s in EE/CE/CS; deep PCIe/CXL knowledge; customer-facing experience; strong communication and product strategy skills.
Category Sourcing Manager – Capital Equipment & IT (6-Month Contract)
San Jose, California, United States
OnsiteContract
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
6+ YOEBachelor's degree in business/supply chain/engineering required; 6+ years sourcing/procurement experience with hardware or capital equipment; experience with RFQs, negotiations, supplier management and procurement systems (Coupa, Oracle, SAP).
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
15+ YOEBachelor's in EE or related, 15+ years hardware manufacturing experience leading cable/PCBA/module/system manufacturing, proven CM/ODM management in Asia, NPI/DFM/mass-ramp expertise, international travel ability.
Hardware Engineering Active Electric Cable / Smart Cable Module, AVP
San Jose, California, United States
OnsiteFull Time
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
Senior technical leader with proven experience leading engineering development for high-speed electrical interconnect products and cable manufacturing; R&D, product development, roadmap ownership, multidisciplinary team management, and experience with overseas (Asia) contract manufacturers.
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
10+ YOEMS in EE/CE with 10+ years or BS with 15+ years experience; expertise in high-speed interface protocols (PCIe, CXL, Ethernet, USB, etc.); PHY/controller knowledge; presales/account management, presentation and communication skills.
Lumilens: Designs photonic interconnects for AI supercomputing infrastructure.
10+ YOE10+ years ASIC/SoC verification experience with team leadership; deep UVM/SystemVerilog, hardware-assisted verification (emulation/FPGA), mixed-signal verification, and regression/CI at scale.
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
10+ YOE10+ years digital IC design experience with ≥4 years PCIe subsystem design/integration; strong SystemVerilog and RTL skills; experience integrating PCIe controller/PHY, PnR constraints, UVM verification, and CXL/PCIe protocols; BS/MS in EE/CE.
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
12+ YOELead GTM strategy for fabric switch and memory controller products; drive positioning, messaging, and competitive strategy; collaborate with engineering, sales, and executive leadership.
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
12+ YOEBachelor's/Master's in EE/CE, 12+ years design verification experience for large SoCs, expertise in SystemVerilog, UVM, Portable Stimulus (PSS), coverage-driven and assertion-based verification, and strong architecture and debugging skills.
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
18+ YOEAdvanced SoC/system architecture expertise (18+ years), degree in EE/CE or related, deep knowledge of high-speed IO and interconnects (UCIe, PCIe, CXL), performance modeling, and strong cross-functional collaboration.
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
15+ YOE5+ Mgmt15+ years in optical engineering with 5+ years in test engineering leadership; expertise in optical transceivers, optical-electrical integration, optical characterization, signal integrity, test strategy, standards compliance, and cross-functional leadership.
Lumilens: Designs photonic interconnects for AI supercomputing infrastructure.
10+ YOE10+ years in digital design and micro-architecture with ownership of high-throughput datapath; strong SystemVerilog/RTL, CDC discipline, UCIe/PCIe/CXL datapath knowledge, timing-aware architecture, and team leadership experience.