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86 design verification engineer jobs at 32 companies in Buena Park, CA

1mo
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Design Verification Engineer
Aliso Viejo or San Jose or Córdoba or Toronto
OnsiteFull Time
indie Semiconductor
indie SemiconductorThe Nasdaq Stock Market LLC: INDI: Public U.S. automotive semiconductor developing mixed-signal chips, photonics, radar, and software for ADAS and industrial mobility.
3+ YOEBachelors in EE/CE/CS,3+ years verification experience, SystemVerilog/UVM, coverage-driven verification, C/C++ and scripting (Python,Tcl,Perl),test planning and debug skills.
SystemVerilog, UVM, C, C++, Python, Tcl, Perl
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3w
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Design Verification Engineer
Broomfield or San Diego or Fort Collins or San Jose or Irvine
$144k-$230k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
10+ YOE12+ years verification experience for complex digital and mixed-signal circuits; proficiency with SystemVerilog/UVM/SVA, scripting, simulation tools, and RTL/gate-level debug; BS/MS in EE/CE.
SystemVerilog, UVM, SVA, Synopsys, Cadence, Mentor, Perl, Python, Tcl, DesignSync, git, Palladium, Veloce, Zebu, Xilinx, ICL, PDL, Tessent
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3mo
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Principal Design Verification Engineer (Silicon Engineering)
Sunnyvale or Austin or Irvine or Redmond
$210k-$310k/yr OnsiteFull Time
SpaceX
SpaceXNasdaq: SPCX: Designing, manufacturing, and launching advanced rockets and spacecraft.
10+ YOEBachelor’s in electrical/computer engineering or computer science; 10+ years in design verification and test bench development.
UVM, OVM, VMM, Python, RTL
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2w
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Staff Design Verification Test Engineer
Costa Mesa, California, United States
$191k-$253k/yr OnsiteFull Time
Anduril Industries
Anduril Industries: Defense technology developing AI-powered autonomous military systems.
12+ YOEBachelor's degree in engineering, physics, or related field; 12+ years in test, verification, or product engineering; RF/microwave measurement, DVT, NPI, failure triage, and engineering leadership experience.
Lattice OS, spectrum analyzers, signal analyzers, VNAs, signal generators, power meters
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Senior ASIC Design Verification Engineer - Terawave
Los Angeles or Seattle or California or Washington or Texas or United States
$230k-$323k/yr RemoteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
8+ YOEBS/MS in EE/CE, 8+ years ASIC/SoC verification experience, deep System Verilog and UVM expertise, verification planning, coverage closure, RTL/debugging, cross-functional collaboration.
System Verilog, UVM, RTL
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Principal ASIC Design Verification Engineer
United States or Los Angeles
$190k-$285k/yr OnsiteFull Time
K2 Space
K2 Space: Building high-power, mass-produced satellite platforms.
10+ YOEB.S. or M.S. in EE/CE or related, 10+ years ASIC/SoC verification, strong SystemVerilog/UVM and SVA skills, experience with VCS/Xcelium/Questa and Verdi/SimVision, scripting (Python/Perl/TCL), Git, CI/CD, C/C++, and ITAR U.S. person eligibility.
SystemVerilog, UVM, SystemVerilog Assertions (SVA), VCS, Xcelium, Questa, Verdi, SimVision, Python, Perl, TCL, Git, C, C++, CI/CD
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3mo
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Sr. Satellite Design Verification Engineer, Amazon Leo
Irvine or Austin or Sunnyvale or Redmond or San Diego
OnsiteFull Time
Kuiper Systems
Kuiper SystemsNasdaq Global Select Market: AMZN: Developing a low Earth orbit satellite network to deliver high-speed, low-latency broadband internet connectivity.
7+ YOEBachelor's in Electrical/Communications Engineering; 3+ years UVM/SystemC/DPI-C; 7+ years verification in communications; preferred advanced degree; Matlab familiarity; DV/integration experience.
UVM, C, SystemC, DPI-C, Matlab
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ASIC / FPGA Design Verification Engineer - (Associate or Experienced)
El Segundo or Huntington Beach
$99k-$162k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designing and manufacturing commercial aircraft and defense systems.
2+ YOEBachelor's degree and 2+ years of ASIC, FPGA, or SoC verification experience, or master's with related coursework. Requires digital verification fundamentals, SystemVerilog, U.S. citizenship, and ability to obtain Secret clearance.
SystemVerilog, UVM, UVC
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ASIC / FPGA Design Verification Engineer - (Associate or Experienced)
El Segundo or Huntington Beach
$99k-$162k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designs and manufactures aircraft, defense systems, and space technology.
2+ YOEBachelor's degree or equivalent in a related technical field, 2+ years of relevant verification experience or related master's coursework, digital verification fundamentals, SystemVerilog, U.S. citizenship, and ability to obtain a Secret clearance.
SystemVerilog, UVM
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2w
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RFIC design engineer
Irvine, California, United States
OnsiteFull Time
SaberTek
SaberTek: SaberTek is a private wireless transceiver IP and RFIC design serving global semiconductor and system companies.
Requires advanced understanding of RFIC design, simulation, layout, and verification; deep submicron process experience; industrial experience; and a Ph.D. or Master of Science in Electrical Engineering.
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Principal Analog Design Engineer
Irvine or San Jose or Vancouver or Ottawa
$150k-$250k/yr OnsiteFull Time
Celero Communications
Celero Communications: Celero Communications is a private semiconductor startup developing coherent DSPs for AI data-center optical connectivity.
5+ YOEMaster’s or PhD in electrical engineering or a related field, 5+ years of experience, strong analog design fundamentals, and experience with Virtuoso, Spectre, ADE, and advanced CMOS verification flows.
Virtuoso, Spectre, ADE, EMX, Momentum, HFSS, CMOS, FinFET, PLL, VCOs, VGA, CTLE, DRV, LDOs
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3d
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Sr. Mechanical Design Engineer
Santa Ana, California, United States
$120k-$150k/yr OnsiteFull Time
Nihon Kohden OrangeMed, LLC
Nihon Kohden OrangeMed, LLCTokyo Stock Exchange: 6849: Treasure Every Breath
7+ YOEBachelor’s degree in mechanical engineering or related discipline; 7+ years’ regulated product design experience; 5+ years’ SolidWorks or 3D CAD experience; medical device, design control, verification, validation, FDA, and 510(k) experience.
SolidWorks, 3D CAD, FDA, ISO, IEC, Design History File (DHF), 510(k)
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Principal Design Engineer CMOS Design Engineer – RF / Mixed-Signal
Manhattan Beach, California, United States
$114k-$171k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Global aerospace and defense technology.
5+ YOETransistor-level CMOS RF/mixed-signal IC design experience, SPICE and Cadence proficiency, PVT and Monte Carlo verification, degree in electrical engineering (B.S. with 5+ years or advanced degree with reduced experience), strong communication skills.
Cadence Virtuoso, SPICE, spectrum analyzer, oscilloscope, probe station, VNAs
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2mo
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Sr. Principal AMS Verification Engineer (Irvine, CA, US)
Irvine, California, United States
$143k-$286k/yr OnsiteFull Time
Skyworks Solutions
Skyworks SolutionsNASDAQ: SWKS: Designs and manufactures analog and mixed-signal semiconductor solutions.
8+ YOERequires BS+15 yrs (MS+12 or PhD+8) experience; strong AMS design/verification background, Verilog-A and SystemVerilog RNM modeling, Cadence Virtuoso/ADS experience, Python scripting, leadership and communication skills.
Cadence Virtuoso, ADS, Verilog-A, SystemVerilog, SystemVerilog Real Number Modeling (RNM), Python
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Digital Design Engineer
Irvine, California, United States
$98k-$144k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
1+ YOE1+ years experience designing and verifying high-performance communications/DSP ASICs; strong RTL (Verilog/System Verilog) and UNIX-based EDA tool skills; experience with verification, synthesis, lint, CDC, power analysis; MATLAB/C++ a plus.
Verilog, System Verilog, UNIX, EDA, MATLAB, C/C++
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Principal Design Engineer CMOS Design Engineer – RF / Mixed-Signal
Manhattan Beach, California, United States
$114k-$171k/yr OnsiteFull Time
Northrop Grumman
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
5+ YOEBachelor's in EE (or related) with 5+ years (masters 3+, PhD 0–2); transistor-level CMOS RF/mixed-signal design experience; SPICE and Cadence proficiency; PVT/Monte Carlo verification; strong communication.
Cadence Virtuoso, SPICE, VNA, spectrum analyzer, oscilloscope, probe station
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RFIC - PLL Design Engineer
Irvine, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designing and manufacturing consumer electronics, software, and digital services.
Design and validate RFIC phase-locked loops (PLLs) and radio transceivers for wireless SoCs; collaborate across RF/analog, systems, VLSI, verification, test, and firmware/software teams.
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Senior Principal Digital Design Engineer
Irvine, California, United States
$186k-$228k/yr OnsiteFull Time
MaxLinear
MaxLinearNasdaq: MXL: Public fabless semiconductor design serving broadband, mobile, wireline, data-center, and industrial customers with communications SoCs.
6+ YOEExpert digital ASIC design experience, SystemVerilog/RTL implementation, block/system verification, synthesis/power/timing analysis, and technical leadership; BS in EE (or advanced) plus extensive experience.
SystemVerilog, Verilog, UVM, SystemC, PCIe, PCI-SIG, IEEE 802.3, SDC
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
Terran Orbital
Terran Orbital: Lockheed Martin-owned satellite manufacturer delivering spacecraft and mission services to government and commercial customers.
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
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2mo
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Hardware Verification Engineer (Agoura Hills, CA, US)
Agoura Hills, California, United States
$141k-$226k/yr OnsiteFull Time
Teradyne
TeradyneNASDAQ: TER: Designs and manufactures automated test equipment and advanced robotics systems.
Strong experience with schematic capture, PCB layout, hardware bring-up, design and debug of complex high-component-count boards, high-current power and mixed-signal electronics, production/DFM support, and independent end-to-end problem solving.
ATE
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