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47 design verification engineer jobs at 25 companies in Temecula, CA

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Design Verification Engineer
Aliso Viejo or San Jose or Córdoba or Toronto
OnsiteFull Time
indie Semiconductor
indie SemiconductorNASDAQ: INDI: Develops next-generation semiconductors and software for automotive sensing and connectivity.
3+ YOEBachelors in EE/CE/CS,3+ years verification experience, SystemVerilog/UVM, coverage-driven verification, C/C++ and scripting (Python,Tcl,Perl),test planning and debug skills.
SystemVerilog, UVM, C, C++, Python, Tcl, Perl
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1mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
Viasat
ViasatNASDAQ: VSAT: Provider of global satellite-based connectivity and secure communication solutions.
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
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3mo
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Design Verification Engineer - Early Career
Santa Clara or Irvine
$87k-$130k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
1+ YOEBachelor’s or Master’s in Electrical/Computer Engineering with 1–3 years experience; Verilog/VHDL; Linux and Python; PCB/architecture knowledge; experience with UVM and ASIC verification.
Verilog, VHDL, UVM, Synopsys, Cadence, Mentor Graphics, Linux, Python, PCIe, Memory Architecture
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1mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
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2mo
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Principal Design Verification Engineer (Silicon Engineering)
Sunnyvale or Austin or Irvine or Redmond
$210k-$310k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
10+ YOEBachelor’s in electrical/computer engineering or computer science; 10+ years in design verification and test bench development.
UVM, OVM, VMM, Python, RTL
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2mo
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Sr. Satellite Design Verification Engineer, Amazon Leo
Irvine or Austin or Sunnyvale or Redmond or San Diego
OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
7+ YOEBachelor's in Electrical/Communications Engineering; 3+ years UVM/SystemC/DPI-C; 7+ years verification in communications; preferred advanced degree; Matlab familiarity; DV/integration experience.
UVM, C, SystemC, DPI-C, Matlab
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3mo
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ASIC Design Verification Technical Leader
Carlsbad or Allentown
$164k-$235k/yr OnsiteFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
8+ YOEBachelor's or higher in Electrical/Computer Engineering; 8+ years ASIC design verification or 6+ with masters; strong SystemVerilog/UVM; leadership experience; scripting (Python, Perl, TCL, Shell).
SystemVerilog, UVM, Python, Perl, TCL, Shell
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3mo
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RTL Design Engineer
Irvine or United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Bachelor's in Electrical Engineering; RTL design with Verilog/SystemVerilog; DSP, verification, lab bring-up; scripting knowledge; hardware-software co-design.
Verilog, SystemVerilog, Perl, Python, DSP, Formal verification
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3mo
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Lead Verification & Validation Engineer
Palo Alto or Irvine
$130k-$155k/yr OnsiteFull Time
ALTEN
ALTENEuronext Paris: ATE: Provides engineering and technology consulting services to industrial clients.
5+ YOELead V&V strategy, mentor engineers, design/test automation, and oversee automotive software/system validation.
CAN, LIN, Ethernet, FlexRay, dSPACE, Vector VT, DBC, LDF, ARXML, HIL, MATLAB, Python, C/C++, Automotive testing tools
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2mo
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Design Controls Engineer
Poway, California, United States
$81k-$142k/yr HybridFull Time
General Atomics
General Atomics: Designs and manufactures unmanned aircraft and nuclear technology systems.
2+ YOESupports design control execution per AS9100, ensures requirements traceability, verification/validation, configuration control; typically requires engineering degree or equivalent experience and ability to obtain DOD clearance.
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1mo
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Sr. Principal AMS Verification Engineer (Irvine, CA, US)
Irvine, California, United States
$143k-$286k/yr OnsiteFull Time
Skyworks Solutions
Skyworks SolutionsNASDAQ: SWKS: Designs and manufactures analog and mixed-signal semiconductor solutions.
8+ YOERequires BS+15 yrs (MS+12 or PhD+8) experience; strong AMS design/verification background, Verilog-A and SystemVerilog RNM modeling, Cadence Virtuoso/ADS experience, Python scripting, leadership and communication skills.
Cadence Virtuoso, ADS, Verilog-A, SystemVerilog, SystemVerilog Real Number Modeling (RNM), Python
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1mo
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Physical Design Engineer
San Jose or Irvine
$150k-$250k/yr OnsiteFull Time
Celero Communications
Celero Communications: Developing high-performance coherent DSP technology for AI connectivity.
5+ YOEBachelor's/Master's in EE, 5+ years full-chip physical verification experience, multiple tapeouts, hands-on with ICV or Calibre, ability to assemble PV flow and floorplanning expertise; Tcl/Python/shell automation preferred.
ICV, Calibre, Tcl, Python, Shell
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2w
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Design Quality Engineer
Irvine, California, United States
$105k-$135k/yr OnsiteFull Time
TAE Technologies
TAE Technologies: Developing commercial fusion power for clean, carbon-free energy.
5+ YOEBS in technical or life science,5+ years in medical device quality systems (ISO 13485,21 CFR 820),strong technical writing,test planning,verification/validation experience,MS Office proficiency,and ability to travel up to 90 days/yr.
Microsoft Office
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1mo
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
Terran Orbital
Terran OrbitalNYSE: LMT: Manufactures modular spacecraft for aerospace and defense missions.
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
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2mo
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Senior Principal Engineer Digital ASIC Design/Manager
San Diego, California, United States
$214k-$348k/yr OnsiteFull Time
Kyocera
KyoceraTokyo Stock Exchange: 6971: Manufactures advanced ceramic components and high-tech electronic equipment.
15+ YOEBS or MS in Electrical Engineering; 15 years in Digital ASIC design; leadership; cross-functional collaboration; RTL/verification; experience with mixed-signal interfaces is a plus.
Verilog, SystemVerilog, LINT, LEC, RDC/CDC, SDF, Genus, Conformal, Innovus, Spyglass Lint, TetraMax, Xcelium, Cadence, Synopsys PrimeTime, VCS, UGV, UVM
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1w
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Senior Staff Analog and Mixed-Signal IC Design Engineer
Irvine, California, United States
$150k-$221k/yr OnsiteFull Time
Marvell Technology
Marvell TechnologyNASDAQ: MRVL: Developing semiconductor solutions for cloud, enterprise, and AI infrastructure.
3+ YOEDesign mixed-signal CMOS transceiver/SERDES circuits (PLLs, ADCs, regulators, TX/RX, CDRs), perform verification with SPICE/Spectre/MATLAB, lab characterization, and produce design documentation. Bachelor’s degree plus relevant experience required.
SPICE, Spectre, MATLAB, Hsim, Verilog
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2mo
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Electro-Mechanical Design-Drafter
Newport Beach, California, United States
$60k-$96k/yr OnsiteFull Time
MACOM
MACOMNASDAQ: MTSI: Designs and manufactures semiconductor products for communications infrastructure.
4+ YOEProficient in schematic-driven RF PCB design, RF/microwave layout, manufacturing documentation, ECOs, and design verification.
Cadence Virtuoso, CALIBRE, ECAD tools
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Quality Engineer 2 NPD
Irvine, California, United States
$65k-$105k/yr HybridFull Time
Johnson & Johnson
Johnson & JohnsonNYSE: JNJ: Provides pharmaceutical products and medical technology healthcare solutions.
Support new product development, perform design verification and process validations, use quality engineering and statistical tools for problem solving and continuous improvement.
Six Sigma, Statistical Process Control (SPC), Design of Experiments (DOE)
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1w
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Principal Systems Engineer (Console System)
Arden Hills or Carlsbad or Maple Grove
$107k-$203k/yr OnsiteFull Time
Boston Scientific
Boston ScientificNYSE: BSX: Developer and manufacturer of innovative medical devices and therapies.
7+ YOE7+ years engineering experience with systems engineering for multidisciplinary medical devices, 5+ years technical leadership, BS in Engineering (or equivalent), experience with design controls, requirements management, and verification/validation.
Jama, DOORS, Requisite Pro, Jira, MATLAB, Python, LabVIEW, Minitab
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1w
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Principal Systems Engineer (Console System)
Carlsbad or Arden Hills or Maple Grove
$107k-$203k/yr OnsiteFull Time
Boston Scientific
Boston ScientificNYSE: BSX: Manufacturer of interventional medical devices and technologies.
7+ YOEBachelor's in engineering,7+ years engineering experience,5+ years technical leadership,systems engineering for multidisciplinary hardware/software medical devices,requirements and verification expertise,experience with regulated Design Controls.
Jama, DOORS, Requisite Pro, Jira, MATLAB, Python, LabVIEW, Minitab, Ethernet, RS232, SPI, I2C, CAN
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