22 dft jobs at 14 companies in Massachusetts
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Senior DFT Engineer - LPU
California or North Carolina or Colorado or Arizona or Florida or Massachusetts
$136k-$265k/yr RemoteFull Time
5+ YOE5+ years DFT experience for high-performance ASICs; Bachelor's (or M.S.) in Computer/Electrical Engineering; experience with SCAN/MBIST/ATPG, silicon bring-up and ATE; strong Tcl and Python coding skills.
ATPG, ATPG Streaming SCAN Network (SSN), Tcl, Python, ATE
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Sr. Design for Test (DFT) Engineer
Toronto or Mountain View or Boston
HybridFull Time
13+ YOEBachelor's in Electrical Engineering, 13+ years DFT experience on ASICs, 2+ tapeouts, experience with DFT CAD/ATPG, Python/TCL scripting, post-silicon bring-up and ATE interfacing.
Python, TCL, SystemVerilog, ATPG, ATE
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Electronic Medical Records Project Manager - Ambulatory Monitoring and Diagnostics (Central/Eastern US)
United States or Alabama or Arizona or Arkansas or Colorado or Florida or Georgia or Idaho or Illinois or Indiana or Iowa or Kansas or Kentucky or Louisiana or Maine or Michigan or Mississippi or Missouri or Minnesota or North Carolina or North Dakota or Nebraska or New Hampshire or New Mexico or Nevada or Ohio or Oklahoma or Oregon or Pennsylvania or South Carolina or South Dakota or Tennessee or Texas or Utah or Virginia or Vermont or Wisconsin or West Virginia or Wyoming or Alaska or Delaware or Hawaii or Maryland or Rhode Island or California or Connecticut or District of Columbia or Massachusetts or New Jersey or New York or Washington
$90k-$160k/yr FieldFull Time
3+ YOE3+ years healthcare IT project management or 7+ years relevant experience; experience with HL7, ADT/ORM/ORU/DFT, FHIR and REST APIs, EMR/EHR integrations, data mapping, VPN/SFTP, and client-facing implementation.
HL7, ADT, ORM, ORU, DFT, FHIR, APIs, REST APIs, VPN, SFTP, EMR, EHR
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(Senior) Scientist, Machine Learning
Cambridge, Massachusetts, United States
$132k-$259k/yr OnsiteFull Time
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) in ML/computational chemistry/CS/applied math; expertise in molecular ML, quantum chemistry/DFT, generative models; Python and PyTorch experience; data curation and cross-functional collaboration.
Python, PyTorch, PyTorch Geometric, DGL, RDKit, ORCA, Gaussian, Q-Chem, DFT
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Principal/Lead Hardware Engineer (Teradyne, North Reading, MA) (North Reading, MA, US)
North Reading, Massachusetts, United States
$141k-$226k/yr OnsiteFull Time
10+ YOE10+ years hardware design; digital/analog, high-speed interfaces, embedded systems, PCB design, DFM/DFT; leadership and mentoring.
Cadence Allegro, Altium Designer, OrCAD
2w
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Research Associate - Chemical and Biological Engineering
Medford, Massachusetts, United States
OnsiteFull Time
3+ YOEPhD and ≥3 years postdoctoral experience, strong DFT background (light-matter and solid-liquid interfaces), publication record, excellent communication; Python and AI/ML experience preferred.
Python
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Lead Principal Engineer Test
Leominster, Massachusetts, United States
$162k-$223k/yr OnsiteFull Time
10+ YOEBS in Engineering or Materials Science, 10+ years semiconductor test engineering, hands-on ATE (Teradyne, Advantest), DFT knowledge, test hardware design, leadership and problem-solving skills.
ATE, Teradyne, Advantest
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Research Scientist, Quantum Chemistry
Cambridge or London
OnsiteFull Time
PhD in computational/theoretical chemistry with catalytic focus, first-author publications, production quantum-chemistry package fluency, DFT and kinetics expertise, Python and computational-chemistry stack experience.
Gaussian, ORCA, Python, ASE, cclib, RDKit, DLPNO-CCSD(T), CASPT2
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ASIC Physical Design Engineer
Maynard or Austin
$136k-$195k/yr HybridFull Time
5+ YOEBachelors in Engineering with 5+ years or Masters in Engineering with 3+ years in ASIC physical design; experience with floorplanning, place-and-route, STA, timing closure, DFT collaboration, scripting, and design flow optimization.
Cadence Innovus, Synopsys ICC2, Synopsys DC/FC, Synopsys Formality, Cadence LEC, Tempus, Python, TCL, Perl
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(Senior) Scientist, Machine Learning
Cambridge, Massachusetts, United States
$132k-$259k/yr OnsiteFull Time
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) with expertise in molecular ML, quantum chemistry/DFT, generative models; proficiency in Python and modern ML frameworks; experience integrating computational and experimental data.
Python, PyTorch, PyTorch Geometric, DGL, RDKit, ORCA, Gaussian, Q-Chem, Greenhouse
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Interconnect Micro-architect/RTL Design Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
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Senior LPU ASIC Engineer
Santa Clara or California or North Carolina or Oregon or Arizona or Massachusetts or United States
$136k-$265k/yr HybridFull Time
5+ YOEB.S. in ECE or equivalent with 5+ years delivering full‑flow physical design for large SoCs; expertise in RTL-to-GDSII flow, low-power (UPF), timing/CTS, PPA optimization, sign-off integrity, DFT, and scripting (TCL/Python/Perl).
TCL, Python, Perl
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Senior Electrical Engineer
Cypress or Andover
OnsiteFull Time
4+ YOEBachelor's in EE/CE, typically 4+ years board-level hardware design experience, proficiency with FPGAs and high-speed interfaces (PCIe, DDR, Ethernet), strong signal-integrity knowledge, design documentation, and mentorship experience. U.S. person required for export-controlled work.
100G+ Ethernet, PCIe Gen 3/4, DDR4/5 SDRAM, fiber optics, HD-SDI, LVDS, Intel, Xilinx, Altera, NVIDIA, Broadcom, TI, SATA, I2C, ARINC-429, Ethernet, Cadence Allegro, JAMA, DOORS, JIRA, Confluence, 100G/200G Ethernet, PCIe Gen4/Gen5, DDR4/DDR5, Mellanox, Marvell, Agilex, Versal, DFR, DFM, DFC, DFT
3w
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Senior Manufacturing Engineer
Cambridge, Massachusetts, United States
$202k-$270k/yr OnsiteFull Time
8+ YOE8+ years manufacturing/process engineering experience delivering electromechanical products; DFx, NPI, quality systems, GD&T, tolerance and BOM experience required.
DFx, DFM, DFA, DFT, FAI, PPAP, SPC, FMEA, CAPA, GD&T, BOM
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Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yr OnsiteFull Time
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.
DDR, LPDDR, GDDR, HBM, eMMC, logic synthesis, physical design, timing, DRC/LVS, Formal verification, Design-For-Test, DFT
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