Lightmatter: Develops photonic processors and interconnects for AI data centers
13+ YOEBachelor's in Electrical Engineering, 13+ years DFT experience on ASICs, 2+ tapeouts, experience with DFT CAD/ATPG, Python/TCL scripting, post-silicon bring-up and ATE interfacing.
Expedition Medicines: Develops covalent small molecule drugs using generative AI.
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) in ML/computational chemistry/CS/applied math; expertise in molecular ML, quantum chemistry/DFT, generative models; Python and PyTorch experience; data curation and cross-functional collaboration.
Dayhoff Labs: AI-driven discovery for synthetic biology and chemical processes.
PhD in computational/theoretical chemistry with catalytic focus, first-author publications, production quantum-chemistry package fluency, DFT and kinetics expertise, Python and computational-chemistry stack experience.
Infineon TechnologiesFrankfurt Stock Exchange: IFX: Designs and manufactures semiconductors for power and IoT systems.
15+ YOEBSEE and 15+ years in semiconductor industry; expertise in mixed-signal electronics, silicon manufacturing, test platforms and analysis tools; experience with yield, DfT, NPI, failure analysis; up to 10% travel.
Thorlabs: Designs and manufactures photonics equipment and specialized optical components.
2+ YOE2+ years relevant engineering/manufacturing experience; Bachelor’s in Engineering or equivalent experience; experience with Solidworks, PLM/D365/Arena; knowledge of GD&T, DFM/DFT, Six Sigma, and quality tools.
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
5+ YOEBachelors in Engineering with 5+ years or Masters in Engineering with 3+ years in ASIC physical design; experience with floorplanning, place-and-route, STA, timing closure, DFT collaboration, scripting, and design flow optimization.
Flagship Pioneering: Conceives, creates, and builds life science platform companies
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) with expertise in molecular ML, quantum chemistry/DFT, generative models; proficiency in Python and modern ML frameworks; experience integrating computational and experimental data.
BAE SystemsLondon Stock Exchange: BA: Designs and manufactures advanced defense and aerospace systems.
4+ YOEBachelor's or equivalent with 4+ years experience, leadership in production test environments, knowledge of product lifecycle/DFM/DFT/DFS, experience with EW/RADAR/communications/missile systems, active US government security clearance (Secret).
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
AmphenolNYSE: APH: Designs and manufactures electronic connectors and interconnect systems.
5+ YOEBachelor’s degree in mechanical, electrical, manufacturing, automation, or industrial engineering; 5+ years in automation/ manufacturing/ process engineering; experience with automated or semi-automated processes; strong DFx/DFM/DFT understanding; ability to read mechanical/electrical/docs; travel ability.
10+ YOEBachelor's in STEM (or equivalent experience) with 10+ years (BS) / 8+ years (MS) / 6+ years (PhD); experience leading engineering teams in development test environments; experience with EW, RADAR, or RF systems; knowledge of DFM/DFT/test equipment; active Secret clearance and ability to obtain Top Secret.
Hyster-Yale Materials HandlingNYSE: HY: Designs, manufactures, and services industrial lift trucks and attachments.
5+ YOE5+ MgmtBachelor's degree in engineering, business, operations, supply chain, or related field; 5–7 years of progressive leadership experience; complex project, operations, and continuous improvement experience.
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
3+ YOERequires 3+ years designing CPU/SoC clocking, reset, and power-management logic; RTL proficiency in Verilog, SystemVerilog, or VHDL; CPU/SoC development through tapeout; and a technical BS/MS or equivalent experience.
Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yrOnsiteFull Time
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.