1mo
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DFT Engineer
Austin, Texas, United States
OnsiteFull Time
5+ YOE5+ years DFT experience including specification, architecture, insertion and analysis; silicon bring-up/debug/validation of DFT features; fault modeling; ATPG/MBIST/JTAG/ATE experience; strong problem-solving and communication skills.
Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, TestKompress, ATPG, MBIST, JTAG, ATE
3mo
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SoC DFT Engineer
Austin or Cupertino
OnsiteFull Time
3+ YOEBS with at least 3 years of experience in silicon DFT; strong Verilog/VHDL and DFT tool knowledge.
Verilog, VHDL, Simulators, Waveform Debugging, Scripting, DFT tools
2mo
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DFT Engineer
Richardson, Texas, United States
$106k-$184k/yr OnsiteFull Time
4+ YOEBachelor’s or Master’s in Electrical/Computer Engineering or related field; 4+ years DFT on SoCs; ATPG, MBIST, LBIST; EDA tools; scripting; test optimization; cross-functional collaboration.
Synopsys TestMAX, Cadence Modus, Mentor Tessent, Python, Perl, TCL
4w
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DFT Engineer
Austin, Texas, United States
$129k-$207k/yr OnsiteFull Time
8+ YOEBSEE with 12+ years or MSEE with 8+ years, strong DFT knowledge including MBIST, scan insertion, ATPG, silicon bring-up and yield improvement, Mentor Tessent/Synopsys experience, and Perl scripting.
Mentor Tessent, Synopsys, Perl
1mo
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Principal DFT Engineer
Austin, Texas, United States
OnsiteFull Time
5+ YOE5+ years DFT implementation and verification experience including scan architectures, JTAG, memory MBIST, ATPG; Verilog/VHDL RTL knowledge; ability to handle RTL DFT changes, analyze ATPG/DRC reports, and support test pattern bring-up.
RTL, MBIST, ATPG, JTAG, TAP, ATE, Verilog, VHDL, SDF
2mo
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DFT Engineer
Richardson, Texas, United States
$106k-$184k/yr OnsiteFull Time
4+ YOEBSc or MSc in EE/CE or related field, 4+ years DFT experience on SoCs (ATPG, MBIST, LBIST, scan), proficiency with Synopsys TestMAX/Cadence Modus/Mentor Tessent, scripting (Python, Perl, TCL), strong analytical and communication skills.
Synopsys TestMAX, Cadence Modus, Mentor Tessent, Python, Perl, TCL, ATPG, MBIST, LBIST
1mo
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Semicustom DFT Strategy Lead
Austin, Texas, United States
HybridFull Time
Senior DFT and testing leader with cross-functional collaboration, roadmap development, and experience with EDA/ATE tools.
EDA tools, ATE tools, CAD tools, DFT tools, Internal DFT tools
2mo
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Principal Test Engineer/DFT Architect
Austin, Texas, United States
OnsiteFull Time
12+ YOEDefine product-level test/DFT strategy; lead cross-functional DFT efforts; mentor engineers; 12+ years in semiconductor test/DFT; strong ATE experience.
ATE, DFT, signal measurement, scripting, Python, MATLAB, SQL
4d
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DFT Implementation Engineer
Austin, Texas, United States
$142k-$200k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years DFT/SoC design experience, RTL design (Verilog/VHDL/SystemVerilog), ATPG/scan/MBIST experience, Tessent and industry DFT tool knowledge, scripting (TCL/Perl/Python).
Tessent Shell, SSN, Tessent Fast IO, ISTK, Siemens EDA (Mentor) Tessent, Synopsys DFT Compiler, Cadence Modus, ATPG, MBIST, Verilog, VHDL, SystemVerilog, TCL, Perl, Python, UPF
3w
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Sr. Staff Engineer - DFT
Austin, Texas, United States
OnsiteFull Time
10+ YOEBS/MS in ECE/EE with 10+ years DFT experience; skilled in scan, scan compression, boundary scan, MBIST, low-power DFT, ATPG and RTL; experience with Tessent MBIST flow, Cadence Genus/Modus, and scripting (Tcl, Perl, Python).
Cadence Genus, Modus, Tessent, Tcl, Perl, Python
2mo
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Principal DFT Engineer (Silicon Engineering)
Austin or Irvine or Sunnyvale
OnsiteFull Time
10+ YOEBachelor’s in electrical/computer engineering or computer science; 10+ years in ASICs and DFT, including scan insertion and validation.
Siemens Tessent, ATPG, Verilog, SystemVerilog, UPF, Formal verification, DRC, Python, Perl, Tcl, C++
3w
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DFT Technical Leader
San Jose or Austin or New York City or New York or Washington or United States or Canada
$184k-$264k/yr HybridFull Time
10+ YOEBachelor's or Master's in Electrical/Computer Engineering, 10+ years experience in DFT, Jtag/Scan/BIST, ATPG and EDA tools, gate-level simulation and post-silicon validation experience.
Jtag, Scan, BIST, ATPG, TestMax, Tetramax, Tessent, PrimeTime, VCS, P1687, Verilog, System Verilog
3w
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Principal DFT Engineer, HBM
Folsom or Richardson
$146k-$309k/yr OnsiteFull Time
7+ YOEBachelor's in EE/CE, 7+ years SoC/DFT experience, expertise in scan/MBIST/LBIST/JTAG/ATPG, familiarity with RTL-to-GDS flows, EDA tools (Siemens, Synopsys, Cadence), and scripting (Python, Tcl, Perl).
Siemens, Synopsys, Cadence, Python, Tcl, Perl
1mo
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DFT Engineer (CE-64000920)
Austin or Chandler or Greensboro
HybridFull Time
2+ YOEMSEE with 2+ years or BS with relevant experience; hands-on ASIC DFT design and verification; experience with FastScan, TestKompress, TetraMAX, Test Compiler; MBIST, scan/ATPG, Verilog/SystemVerilog/VHDL; scripting (Perl, Python, TCL); strong communication.
FastScan, TestKompress, TetraMAX, Test Compiler, Verilog, SystemVerilog, VHDL, Perl, Python, TCL
1mo
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DFT Engineer (Design for Testability) - Staff
Richardson, Texas, United States
OnsiteFull Time
5+ YOEBachelor's/Master's in EE/CE or equivalent, strong digital design and DFT fundamentals (scan, MBIST, JTAG), RTL experience (SystemVerilog/VHDL), familiarity with semiconductor test flows, and 5+ years DRAM or ASIC DFT design/verification experience.
SystemVerilog, VHDL, RTL, JTAG, MBIST
1mo
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DFT Design Engineer
Austin, Texas, United States
OnsiteFull Time
2+ YOEUS citizenship required. 2+ years SoC/ASIC digital design experience focused on DFT, including scan chain insertion, compression scan, MBIST/LBIST, ATPG, JTAG/IEEE standards, Verilog testbench debugging, and familiarity with Cadence tools/flows.
Cadence tools and flows, Verilog, ATPG, MBIST, LBIST, JTAG 1149.1/6, IEEE1500, IEEE1687
2mo
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Sr. DFT Design Engineer, AWS Machine Learning Acceleration
Austin, Texas, United States
$159k-$215k/yr OnsiteFull Time
5+ YOE5+ years ASIC/SoC design; DFT, ATPG, JTAG, MBIST; scripting; collaboration with PD/architecture; RTL through silicon experience.
ATPG, JTAG, MBIST, RTL, Python, Perl, Tcl, DFT/SCAN/ATPG tools
1mo
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Principal Engineer, Digital Design (IO Subsystem)
Allen, Texas, United States
OnsiteFull Time
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
10+ YOEBachelor's in EE (Master's preferred), 10+ years digital IC/RTL design, expert SystemVerilog, Python, UVM, UPF/STA/timing signoff, DFT experience, and strong cross-functional collaboration.
SystemVerilog, Python, UVM, UPF, STA, DFT, AI/ML
1mo
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Principal SLT Test Engineer
Austin, Texas, United States
OnsiteFull Time
Proven functional/ATE test engineering background, experience with SLT, DFT and production test, scripting skills (Python, TCL, Perl, Shell), degree in electronics or related field, ability to lead and mentor engineers.
SLT, ATE, DFT, JTAG, BIST, MBIST, Python, TCL, Perl, Shell
1mo
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Electronic Medical Records Project Manager - Ambulatory Monitoring and Diagnostics (Central/Eastern US)
United States or Alabama or Arizona or Arkansas or Colorado or Florida or Georgia or Idaho or Illinois or Indiana or Iowa or Kansas or Kentucky or Louisiana or Maine or Michigan or Mississippi or Missouri or Minnesota or North Carolina or North Dakota or Nebraska or New Hampshire or New Mexico or Nevada or Ohio or Oklahoma or Oregon or Pennsylvania or South Carolina or South Dakota or Tennessee or Texas or Utah or Virginia or Vermont or Wisconsin or West Virginia or Wyoming or Alaska or Delaware or Hawaii or Maryland or Rhode Island or California or Connecticut or District of Columbia or Massachusetts or New Jersey or New York or Washington
$90k-$160k/yr FieldFull Time
3+ YOE3+ years healthcare IT project management or 7+ years relevant experience; experience with HL7, ADT/ORM/ORU/DFT, FHIR and REST APIs, EMR/EHR integrations, data mapping, VPN/SFTP, and client-facing implementation.
HL7, ADT, ORM, ORU, DFT, FHIR, APIs, REST APIs, VPN, SFTP, EMR, EHR
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