91 digital design engineer jobs at 38 companies in Argyle, TX
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Staff Digital Design Engineer, HBM
Richardson, Texas, United States
OnsiteFull Time
3+ YOEBachelor's in EE or equivalent, 3+ years digital/RTL design experience with Verilog/SystemVerilog, synthesis/STA and CDC experience, Linux and scripting (Python/Perl), strong digital logic and microarchitecture skills.
Verilog, SystemVerilog, Linux, Python, Perl, CPF, UPF, SDC, AMBA, AXI, APB, DFT, CAD, ATPG, BIST
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Digital IC Design Engineer - USB Products
Dallas, Texas, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical/Computer Engineering, 2 years digital design experience, Verilog experience, understanding of digital logic and ASIC design flow, and strong problem-solving skills.
Verilog, System Verilog, AMS, UVM, Perl, Tcl, Python
2w
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Senior Staff Digital Design Engineer
Plano, Texas, United States
HybridFull Time
5+ YOE5+ years in digital IC design with Verilog/SystemVerilog, RTL, synthesis, STA, verification, silicon debug, UVM and experience with industry EDA tools; B.Tech/M.Tech in electronics or related field.
Verilog/SystemVerilog, UVM, I²C, I3C, SPI, UART, Python, Tcl, Perl, Shell, Xcelium, Genus, SpyGlass, OneSpin/JasperGold, Innovus, PrimeTime/Tempus, DFT, ARM, AMBA (AXI/AHB/APB), Cadence Virtuoso, STA, LEC, Lint, Formal Verification
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Staff Digital Design Engineer, HBM
Richardson, Texas, United States
OnsiteFull Time
3+ YOEBachelor's in EE (or equivalent) with 3+ years experience; RTL design in Verilog/SystemVerilog, synthesis/STA, CDC analysis, low-power methodologies, Linux and scripting (Python/Perl); strong digital logic and architecture skills.
Verilog, SystemVerilog, Linux, Python, Perl, CPF, UPF, SDC, AMBA, AXI, APB
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Principal Engineer, Digital Design (IO Subsystem)
Allen, Texas, United States
OnsiteFull Time
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
10+ YOEBachelor's in EE (Master's preferred), 10+ years digital IC/RTL design, expert SystemVerilog, Python, UVM, UPF/STA/timing signoff, DFT experience, and strong cross-functional collaboration.
SystemVerilog, Python, UVM, UPF, STA, DFT, AI/ML
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Senior Digital Hardware Design Engineer - Onsite
McKinney, Texas, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEU.S. citizen with active Secret DoD clearance, STEM degree, minimum 5 years relevant experience designing and testing digital circuit card assemblies with FPGAs, processors, high-speed interfaces, schematic/CAD tools, and lab integration.
FPGA, ECAD, Siemens Xpedition, xDX Designer, xPCB Layout, HyperLynx, Xpedition Constraint Editor System (CES), Earned Value, Agile Execution
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Principal Engineer DSP PHY Digital Design
Dallas, Texas, United States
HybridFull Time
10+ YOEB.S. +10 yrs or M.S. +7 yrs in EE/CE or related; strong digital communications/DSP fundamentals; experience with high-speed wireline DSP (FFE/DFE, CDR, FEC), RTL design/verification; C++, MATLAB proficiency.
C++, MATLAB, Python
5d
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Engineer, Avionics Design
Fort Worth, Texas, United States
OnsiteFull Time
5+ YOEBachelor's degree in electrical engineering or related field; 5–10 years of mixed-signal electronic design experience in avionics or sensor integration. Requires analog/digital design, PCB layout, C programming, and troubleshooting.
STM32, SPICE, Altium, Microsoft Office, C, ARP4761, DO-160, MIL-STD-704, MIL-STD-461, MIL-STD-810, DO-254
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Senior Rail Track Design Engineer
Coral Gables or New York City or Tampa or San Francisco or Houston or Los Angeles or Chicago or Pensacola or Dallas
HybridFull Time
8+ YOESenior track design engineer with 8+ years rail experience, PE licensure, civil engineering degree; BIM/Digital design tools proficiency; lead complex rail projects in the US.
Bentley OpenRail, OpenRoads, InRoads, MicroStation, Civil 3D
2w
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Digital Design Specialist: Structural Engineering
Dallas, Texas, United States
$59k-$95k/yr HybridFull Time
4+ YOE4–15 years structural drafting/BIM experience, proficiency in CAD and Revit, strong documentation and coordination skills, Associate in Computer Drafting preferred, effective communication.
CAD, Revit
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Staff Wireless IC Digital Designer
Dallas, Texas, United States
OnsiteFull Time
8+ YOESenior level design engineer with 8-12 years in digital RF/wireless design, IC/SoC development, RTL, and verification.
RTL, Synthesis, STA, ATPG, RFIC, SoC, Digital design, FPGA design
2w
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Staff Engineer, FPGA Design (R5347)
Dallas, Texas, United States
$150k-$230k/yr OnsiteFull Time
Strong FPGA design, implementation, verification skills using VHDL/SystemVerilog; experience with timing closure, clock domain crossing, and high-performance digital communications; degree in STEM; Git proficiency.
VHDL, SystemVerilog, AMD/Xilinx development tools, Vivado, Git, TCL, AXI4, AXI-Stream, CI/CD
2mo
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Optical Transceiver Circuit Design Engineer
Richardson, Texas, United States
RemoteFull Time, Contract
10+ YOE10+ years optical transceiver circuit design; Cadence/Synopsys flows; DFM/DFMEA; laser drivers, PAM-4, TIAs; strong analog/digital/mixed-signal expertise; design reviews and post-silicon support.
Cadence, Synopsys, DFMEA
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Regional Design Technology Director
Dallas or Austin or Houston
OnsiteFull Time
15+ YOE15+ years AEC experience; bachelor’s in architecture/engineering/computer science; licensed professional preferred; strong leadership, digital design, BIM, computation, visualization expertise; presentation and interpersonal skills.
AutoCAD, Rhino, Grasshopper, Dynamo, 3D Studio Max, V-Ray, Adobe Creative Suite
4d
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Mixed Signal Design Verification (MSDV) Engineer
Dallas, Texas, United States
OnsiteFull Time
Bachelor's, master's, or PhD in electrical engineering or related field; analog, digital, and mixed-signal verification experience; Verilog, SystemVerilog, UVM, scripting, EDA tools, and strong analytical skills.
Cadence Virtuoso, Verilog, Verilog-A, SystemVerilog, Universal Verification Methodology (UVM), Unix shell, TCL, Perl, Python, SKILL, I2C, PMBus, SPI, DesignSync, SVN, Git
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Digital Software Engineer Lead Analyst
Irving, Texas, United States
$157k-$193k/yr HybridFull Time
4+ YOEBachelor's in CS or related and 4+ years software engineering experience; 4 years with Java, Python, Spring Boots and Microservices; 3+ years with data science tools (numphy, pandas, scikit learn, langchain, langgraph); experience designing and deploying scalable software and ML models.
Java, Python, Spring Boots, Microservices, numphy, pandas, scikit learn, langchain, langgraph
3w
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SoC Design Verification Engineer (2026 New College Graduate)
Richardson, Texas, United States
$86k-$148k/yr OnsiteFull Time
0+ YOEBachelor's in EE/CE or related, 0-2 years digital verification experience, Verilog/SystemVerilog, Python/Tcl/Perl, UNIX/EDA tools, strong analytical and communication skills.
Verilog, SystemVerilog, Python, Tcl/Tk, Perl, UNIX, EDA design tools, RISC-V, ARM, MIPS, C, C++
3w
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SoC Design Verification Engineer (2026 New College Graduate)
Richardson, Texas, United States
$86k-$148k/yr OnsiteFull Time
0+ YOEBachelor's in EE/CE,0-2 years digital verification experience, proficiency with Verilog/SystemVerilog, scripting (Python,Tcl/Tk,Perl), UNIX and EDA tools, strong analytical and communication skills.
Verilog, SystemVerilog, Python, Tcl/Tk, Perl, C, C++, UNIX, EDA design tools
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Digital Software Engineer Lead Analyst VP
Irving, Texas, United States
$139k-$208k/yr HybridFull Time
6+ YOE6+ years experience in software engineering, expertise in Angular and Java microservices, RESTful APIs, cloud platforms (AWS, PCF, Akamai), CI/CD and SDLC practices, strong architecture, design review, and communication skills; bachelor’s degree.
AWS, AWS PWS, PCF, Akamai, Angular, Java, RESTful APIs, micro services, Devin, GitHub Co-pilot, CI/CD, SDLC
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Design Engineering Manager - Kiewit Infrastructure Engineers
Lone Tree or Westlake or Bellevue
$195k-$215k/yr OnsiteFull Time
10+ YOE3+ MgmtPE or RA required, Bachelor's degree in engineering/architecture, 10+ years in large multidisciplinary infrastructure projects, 3+ years managing teams, design-build/P3/EPC experience, strong communication and constructability expertise.
BIM/VDC, digital delivery
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