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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
2mo
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FPGA Design Engineer
Huntsville, Alabama, United States
OnsiteFull Time
2+ YOETwo+ years' experience in FPGA/embedded design for SDR; knowledge of RF, analog/digital electronics; U.S. citizenship with active Secret or higher clearance.
FPGA, LabVIEW, Digital Electronics, Analog Electronics, RF Test Equipment, SRIO, RF Signal Processing
1w
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FPGA Design Engineer III
Austin, Texas, United States
OnsiteFull Time
3+ YOE3+ years Verilog RTL FPGA design experience, Bachelor's degree in EE/CE, full FPGA design flow knowledge, proficiency with major FPGA tool suites, and experience with verification and timing closure.
Verilog, VHDL, SystemVerilog, Microchip PolarFire SoC, RISC-V, PCIe, Ethernet, SERDES, UVM, Libero SoC, Xilinx Vivado, Intel Quartus, logic analyzers, oscilloscopes, Linux
2mo
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Senior FPGA Design Engineer
McKinney, Texas, United States
$87k-$165k/yr OnsiteFull Time
5+ YOESTEM degree with 5+ years FPGA design experience; VHDL/Verilog proficiency; experience with Xilinx/Altera/Microchip FPGAs; onsite in McKinney, TX; DoD Secret security clearance.
VHDL, Verilog, Xilinx FPGAs, Altera FPGAs, Microchip FPGAs, Python, Perl, C
3mo
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FPGA design FADEC SPU
San Diego, California, United States
$80k-$140k/mo OnsiteMultiple Commitments Available
FPGAs design experience; FADEC SPU familiarity; mid-senior level with full-time employment.
FPGA, VHDL/Verilog, Embedded Systems, CAD Tools, Simulation Tools, DSP
1mo
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Principal FPGA/Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$179k/yr OnsiteFull Time
5+ YOEU.S. citizenship and active government clearance required; bachelor’s in EE/CE or equivalent experience; 5+ years digital electronics/FPGA design experience (8+ for Sr. Principal); experience with digital prototyping, simulation, and documentation tools.
FPGA, Xilinx, Altera, Actel, DOORS, ClearCase, ClearQuest, Cadence Concept, Allegro, Mentor DxDesigner, Expedition
2mo
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Sr. FPGA Design Engineer
Milpitas, California, United States
$141k-$240k/yr OnsiteFull Time
3+ YOEExperience designing complex FPGA firmware; proficient with Xilinx/Intel FPGAs; HDL Verilog/SystemVerilog; FPGA tools (Vivado, VCS/Modelsim); timing analysis; knowledge of PCIe, DDR4, 10G, SPI, I2C; collaboration with hardware and software teams.
VCS, Modelsim, Vivado, Verilog, SystemVerilog, PCIe, Aurora, DDR4, 10G, SPI, I2C, embedded Linux
2mo
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Senior FPGA Design Engineer
Manchester or Nashua
$97k-$165k/yr OnsiteFull Time
4+ YOEU.S. person required and able to obtain Secret clearance; typically Bachelor's degree with 4+ years relevant experience; FPGA/ASIC design, RTL coding (VHDL/Verilog), synthesis, timing closure, lab debug, and familiarity with high-speed interfaces and revision control.
FPGA, VHDL, Verilog HDL, Xilinx Vivado, Intel/Altera Quartus, Modelsim, Questa, GIT, CVS, Clearcase, Subversion, Perl, Tcl, Python, shell, SERDES, PCIe, DDR2/3/4, LVDS
3mo
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FPGA Design Engineer - Avionics
Saratoga, California, United States
$150k-$250k/yr OnsiteFull Time
5+ YOE5+ years FPGA design experience; SystemVerilog/VHDL; AXI interfaces; timing closure; radiation-tolerant design knowledge.
SystemVerilog, VHDL, AXI, SPI, I2C, GPIO, Python, TCL, Shell scripting, Makefiles, VCS, QuestaSim
2mo
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Sr. FPGA Design Engineer
Seattle or United States
$215k-$300k/yr HybridFull Time
8+ YOEBachelor’s in Electrical or Computer Engineering; 8+ years hardware development; FPGA design, verification, and synthesis experience.
Verilog, VHDL, ModelSim, Vivado, Quartus
3mo
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FPGA Design Engineer
Rolling Meadows, Illinois, United States
$96k-$145k/yr OnsiteFull Time
2+ YOEBS in STEM with 2+ years digital electronics design (or MS), FPGA/circuit card prototyping and debug, digital simulation and test, familiarity with DOORS/ClearCase/ClearQuest, ability to lead small projects, U.S. citizenship and active Secret clearance.
Xilinx, Altera, Actel, DOORS, ClearCase, ClearQuest, Cadence Concept, Allegro, Mentor DxDesigner, Expedition
1w
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FPGA Design Engineer, Senior
Huntsville, Alabama, United States
OnsiteFull Time
10+ YOEBachelor's in EE/CE/Math/Physics,10+ years FPGA design experience, Verilog/VHDL expertise, DSP knowledge, experience with FPGA tools, communication protocols, U.S. citizenship and active Secret clearance required.
Verilog, VHDL, Xilinx Vivado, Intel/Altera Quartus, Synplify, ModelSim, Verdi, RS-232, RS-422, UART, SPI, I2C
1mo
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FPGA Design Engineer
Tucson, Arizona, United States
OnsiteFull Time
8+ YOEB.S. in EE/CE, 8+ years FPGA design experience with VHDL, AMD/Xilinx/Vivado, RTL-to-hardware lifecycle, lab debugging, Git, ModelSim/QuestaSim, and scripting (Python/Perl/Ruby). U.S. work authorization required; clearance may be needed.
VHDL, AMD/Xilinx, Vivado, Git, ModelSim, QuestaSim, Python, Perl, Ruby, oscilloscope, spectrum analyzer, signal source, power supply
2w
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FPGA Design & Validation Engineer
Houston, Texas, United States
$60k-$100k/yr OnsiteFull Time
3+ YOEExpertise in VHDL, FPGA development and validation, lab hardware-in-the-loop testing, timing/post-synthesis verification, ADC/DAC interfacing, and 3+ years FPGA experience; B.E./M.Tech in relevant field.
VHDL, Verilog, Xilinx Vivado, Intel Quartus, Microchip Libero, Lattice FPGA, XPE, Oscilloscope, SignalTap, Logic Analyzer
2w
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FPGA Design Engineer
Long Beach, California, United States
$135k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA development with AMD/Xilinx platforms,expertise with Vivado/Vitis and HDL,experience with PCIe/Ethernet/SerDes,hardware/software integration and production bring-up.
Xilinx Vivado, Vitis, Vivado ILA, VIO, Git, Python, TCL, ModelSim, Vivado Simulator, PetaLinux
2mo
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Senior FPGA Design Engineer
San Jose, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEStrong RTL FPGA design experience with Vivado and Protocompiler; FPGA/IP integration; 5+ years; PCIe/USB/Ethernet; BS/MS in EE/EECS/CS; English.
Vivado, Protocompiler, IP Integration, PCIe, USB, Ethernet, SPI
1w
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Electrical & FPGA Design Engineer
Kennedy Space Center, Florida, United States
OnsiteFull Time
10+ YOEBachelor's in EE/CE, typically 10+ years experience designing mixed analog/digital circuit boards and FPGA hardware; proficiency with Altium Designer/Cadence OrCAD and LTSpice; VHDL/FPGA experience preferred; Secret clearance preferred.
Altium Designer, Cadence OrCAD, LTSpice, Libero, ModelSim, Active-HDL, Xilinx Vivado, VHDL
3w
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FPGA Design Engineer
New York City, New York, United States
$200k-$280k/yr OnsiteFull Time
Proven FPGA experience bringing RTL to timing-closed hardware; expert SystemVerilog/VHDL and Xilinx Vivado; PCIe and common bus protocols; strong Python/C++ for automation; board bring-up and lab debugging skills.
SystemVerilog, VHDL, Xilinx Vivado, ILA, Vivado Analyzer, Python, C++, PCIe, AXI, AHB, SPI, UART, JTAG, HAPS, VCU118, VPK180, Cocotb, UVM, OSVVM, hls4ml, FINN, GitLab CI, Docker, oscilloscope, logic analyzer
2w
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FPGA Design Engineer
Cedar Rapids, Iowa, United States
$80-$90/hr RemoteContract, Temporary
5+ YOEBachelor's in EE/CE/CS,5+ years FPGA VHDL experience in safety-critical aerospace/defense,DO-254 experience,RTL simulation/synthesis/place-and-route/timing closure skills,US citizen/PR required.
VHDL, C++, VxWorks, Atlassian Suite, Jama, Coverity, Rapita, ARINC-653, ARINC-429, MIL-STD-1553, AFDX, CAN, SPI, UART
2w
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Staff FPGA Design Engineer
Berthoud, Colorado, United States
$150k-$180k/yr OnsiteFull Time
10+ YOEB.S. in Electrical Engineering with 10+ years in electronics hardware and ASIC/FPGA development for flight avionics; experience with mixed-signal design, VHDL/Verilog/SystemVerilog, timing closure, EMI/EMC, and hardware verification.
VHDL, Verilog, SystemVerilog, Python, TCL, Xilinx, Microsemi, MATLAB, Simulink, SPICE, Altium, SystemVerilog UVM, C, C++, assembly language, Linux/Windows shell scripting, Cocotb
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