361 fpga engineer jobs at 116 companies in Concord, CA
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Senior FPGA Engineer, LEO Payload FPGA
Sunnyvale, California, United States
$183k-$248k/yr OnsiteFull Time
7+ YOEBachelor's in Electrical Engineering, 7+ years FPGA/System Verilog experience, proficiency with ASIC/FPGA tools, Python test scripting, Xilinx/AMD/Altera FPGAs, RTL/uArchitecture, timing and power optimization, simulation and validation.
System Verilog, Python, Xilinx, AMD, Altera, uArchitecture, RTL, Cocotb, AXI4, AXI Streaming, SerDes, Interlaken, 50G/100G Ethernet
2d
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Lead FPGA Engineer
Milpitas, California, United States
$118k-$200k/yr OnsiteFull Time
0+ YOEDegree in engineering or related field plus 0–5 years of related experience depending on degree; FPGA RTL, high-speed digital design, SystemVerilog, Verilog, VHDL, firmware integration, debugging, and system testing experience.
FPGA, SystemVerilog, Verilog, VHDL, Xilinx Vivado, Xilinx ISE, Synplify, Questa, ModelSim, Python, MATLAB, OrCAD, PCIe, DDR, 10G SerDes, PCB
1mo
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FPGA Engineer
El Segundo or Los Angeles or Washington or San Francisco or Seattle or London
$160k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in a relevant field, 5+ years FPGA RTL design experience, Verilog/SystemVerilog, AXI protocols, Vivado and SoC FPGA experience, Bash/Python scripting, U.S. Person required.
Verilog, SystemVerilog, AXI4, AXI4-Lite, AXI4-Stream, Vivado Design Suite, Zynq, Ultrascale, Ultrascale+, Versal, TCP, UDP, IP, I2C, JTAG, UART, SPI, CAN, Bash, Python, Simulink, MATLAB, C, C++, SystemC, Chisel, VHDL, git, Bitbucket CI, Jenkins
3mo
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FPGA / VLSI Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
Design and verify RTL/FPGA, perform FPGA prototyping, and system integration for ASIC/SoC platforms; strong SystemVerilog/Verilog; experience with UVM; VHDL is a plus.
SystemVerilog, Verilog, UVM, VHDL, FPGA, SoC
3w
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System FPGA Engineer
Santa Clara or Austin
$152k-$228k/yr OnsiteFull Time
5+ YOEBachelor's or higher in engineering/CS and 5+ years FPGA implementation and verification experience; proficiency in Verilog/SystemVerilog, Python, cocotb, git/GitHub, vendor FPGA toolchains; strong communication skills.
Python, git, GitHub, cocotb, Verilog, SystemVerilog, AMD/Xilinx Vivado/Vitis, Intel/Altera Quartus Prime, JTAG, oscilloscope
2d
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FPGA Engineer (eInfochips Inc)
Mountain View, California, United States
OnsiteFull Time
Experience with FPGA prototyping, C/C++ test content, SystemVerilog, Python, post-silicon validation, hardware debugging, verification, industry protocols, and cross-functional engineering collaboration.
C, C++, SystemVerilog, HAPS, Xilinx, Python, Perl, Ruby, JTAG, logic analyzers, oscilloscopes, multimeters, AMBA, AXI, AHB, APB, SPI, I2C, I3C, USB
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Senior FPGA Engineer
Redwood City, California, United States
$150k-$250k/yr OnsiteFull Time
5+ YOEBachelors in ECE or related, 5+ years FPGA design experience, Xilinx tool experience, embedded C/C++, Python, experience with Zynq UltraScale+ MPSoC and Linux embedded systems; U.S. authorization required under ITAR.
Zynq UltraScale+ MPSoC, Xilinx FPGA design tools, C/C++, Python, PetaLinux, Yocto, Linux, Google Meet
3w
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Sr. FPGA Engineer, Certification
Mountain View, California, United States
$215k-$300k/yr OnsiteFull Time
10+ YOEBachelor's in EE/CE (or equivalent), 10+ years aviation electronics hardware development, DO-254 level A/B FPGA certification experience, FPGA design/verification, tool qualification, FAA/DER coordination, US export-control compliance.
1d
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Host and Network IO FPGA Engineer
Sunnyvale or Toronto
HybridFull Time
5+ YOERequires 5+ years producing FPGA solutions, or a master's/PhD in computer or electrical engineering plus 3 years' experience; Verilog, Git, FPGA workflows, TCP/RoCE, and network debugging.
Verilog, Git, Wireshark, TCP, RoCE, Arista, Juniper
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FPGA Engineer (CA, San Jose)
San Jose, California, United States
HybridFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience in FPGA design and verification, proficiency in RTL/C/C++, Python; familiarity with VHDL/Verilog, hardware security, IP core development, and FPGA tools.
C, C++, Python, VHDL, Verilog, Tcl, Vivado, GHDL, Questa, Quartus Prime, Xilinx, Altera, Versal, Stratix, Avalon, AXI, ACE, IP cores, cocotb, pyuvm
2mo
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FPGA Silicon Validation Engineer
San Jose, California, United States
$106k-$154k/yr OnsiteFull Time
3+ YOEBachelor's degree in electrical engineering (or related) plus 3 years' industry experience; FPGA architecture knowledge; experience with C and Python preferred; hands-on debug with oscilloscopes and power supplies; internship/work experience preferred.
FPGA, RTL, C, Python, oscilloscope, power supply
2w
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Senior FPGA Modem Engineer
Mountain View or San Diego
$190k-$280k/yr OnsiteFull Time
10+ YOE10+ years designing and implementing FPGA-based wireless modem solutions; proficiency in HDL, verification, FPGA toolchains, lab debugging, and embedded SW/HW integration.
SystemVerilog, Verilog, VHDL, SystemVerilog/UVM, Cocotb, AMD Vivado, Linux, Git, C, C++, Python
2w
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Staff FPGA Engineer (Future Forward)
Sunnyvale, California, United States
$213k-$307k/yr OnsiteFull Time
8+ YOEExpertise in Verilog/SystemVerilog and FPGA design, experience with Vivado/QuestaSim/Chipscope, scripting (Python,Tcl,Perl,Shell), version control (Git,SVN), C/C++, MATLAB, and strong communication skills.
Verilog, SystemVerilog, Vivado, QuestaSim, Chipscope, Python, Tcl, Perl, Shell, Git, SVN, C, C++, MATLAB
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Senior FPGA Design Engineer
San Jose, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEStrong RTL FPGA design experience with Vivado and Protocompiler; FPGA/IP integration; 5+ years; PCIe/USB/Ethernet; BS/MS in EE/EECS/CS; English.
Vivado, Protocompiler, IP Integration, PCIe, USB, Ethernet, SPI
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Senior FPGA Prototyping Platform Engineer
Santa Clara, California, United States
$168k-$311k/yr OnsiteFull Time
7+ YOEBS in Electrical/Computer Engineering with 7+ years FPGA prototyping or MS with 5+ years; strong FPGA prototyping, lab, and debugging skills.
Synopsys Protocompiler, Xilinx Vivado, ChipScope, Oscilloscopes, Logic Analyzers, Protocol Analyzers
3w
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FPGA Software
San Carlos, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA/RTL design experience,proficiency in SystemVerilog/Verilog,Vivado/Vitis/Petalinux,ARM SoC platforms,DDR/DMA design,C/C++/Python for bring-up.
SystemVerilog, Verilog, Zynq UltraScale+, Versal, Cyclone 10, Vivado, Vitis, Petalinux, Quartus, Questa, ModelSim, Xcelium, Verilator, UVM, C, C++, Python, TCL, OpenBMC, Redfish, IPMI
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Sr FPGA Design Engineer
Santa Clara, California, United States
OnsiteFull Time
8+ YOEBSEE or MSEE in EE/CE or related, 8+ years FPGA and embedded hardware development, strong Verilog/SystemVerilog/VHDL skills, experience with AMD/Xilinx/Intel/Altera/Lattice/Microchip platforms, PCB/PCBA and production experience, US work authorization required.
Verilog, SystemVerilog, VHDL, AMD/Xilinx, Intel/Altera, Lattice, Microchip, PCIe, Ethernet, USB, SPI, I2C, UART, CAN, DDR, DSP, Altium, Cadence Allegro, OrCAD, PCB, PCBA, DFM, DFT, EMC, EMI
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Sensing & Imaging FPGA Engineer
Cupertino, California, United States
OnsiteFull Time
Develop design solutions and early-stage hardware systems integrating cameras and non-vision sensors for consumer devices; collaborate in cross-functional engineering teams.
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Senior FPGA Prototyping Platform Engineer
Santa Clara, California, United States
$168k-$311k/yr OnsiteFull Time
5+ YOEBS (or equivalent) with 7+ years or MS with 5+ years in FPGA prototyping; expertise in synthesis, place-and-route, timing closure, lab FPGA debug, and coordination with verification and software teams.
Synopsys Protocompiler, Xilinx Vivado, ChipScope, Synopsys HAPS, oscilloscopes, logic analyzers, protocol analyzers
4w
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Senior FPGA Design Engineer,( Nextest, San Jose, CA)
San Jose, California, United States
$170k-$273k/yr OnsiteFull Time
8+ YOEB.S. or M.S. in Electrical Engineering, 8+ years relevant experience, RTL/Verilog, FPGA transceiver and timing experience, C/C++, EM/FPGA tool flow familiarity, lab equipment experience.
C, C++, Linux, Windows, Verilog HDL, Intel FPGA tool flows, Xilinx FPGA tool flows, UVM, ATE
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