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36 ic design engineer jobs at 14 companies in Mesa, AZ

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Principal Power IC Design Engineer
Chandler, Arizona, United States
OnsiteFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
8+ YOEMSEE (10+ yrs) or PhD (8+ yrs) power IC design experience; transistor-level design of power management circuits; experience with BCD/HV-CMOS, control-loop design; proficiency with Cadence Virtuoso and Spectre/APS; leadership from concept to silicon.
Cadence Virtuoso, Spectre/APS
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Senior Technical Staff Engineer – IC Analog Design
Chandler, Arizona, United States
OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
12+ YOESenior IC analog design engineer with 12+ years, DAC/ADC expertise, CMOS design, lab testing, Cadence tools, scripting.
Cadence Virtuoso, Cadence Spectre, MATLAB, Python, Tcl
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Senior Design Lead (122083)
Chandler or Hillsboro
OnsiteContract
HCLTech
HCLTechNational Stock Exchange of India: HCLTECH: Global provider of information technology services and software consulting.
10+ YOEBachelor's or Master's in Electrical/Electronics Engineering; ~10+ years IC packaging/package design for senior level (4–6+ years mid); hands-on experience with Siemens (Mentor) Xpedition or Cadence Allegro/APD, physical/substrate design, SI/PI-aware design, DFM and design rule compliance.
Siemens (Mentor) Xpedition (XPD), Cadence Allegro, Advanced Package Designer (APD / SiP)
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3mo
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Digital Design Engineer
Austin or Greensboro or Chandler
HybridFull Time
Cirrus Logic
Cirrus LogicNASDAQ: CRUS: Designs mixed-signal integrated circuits for consumer electronics.
2+ YOEDegree in Electrical or Computer Engineering; 2+ years digital IC design; Verilog RTL; digital design flow; state machines; CMOS VLSI knowledge; strong problem solving.
Verilog, UVM, MATLAB, Simulink
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4w
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Engineer, Design (29020)
Tempe, Arizona, United States
HybridFull Time
Amkor Technology
Amkor TechnologyNasdaq: AMKR: Provides outsourced semiconductor packaging and test services globally.
Bachelor's in engineering required. Experience creating IC package designs and engineering drawings using CAD; strong communication, self-motivation, and ability to work with minimal supervision. Must be a U.S. Person for export-controlled information.
CAD, Cadence APD, Cadence Sigrity, Siemens Expedition, Ansys HFSS, CAM350
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4w
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Analog Design Engineer
Scottsdale or Chandler or Phoenix
$134k-$168k/yr OnsiteFull Time
STMicroelectronics
STMicroelectronicsNew York Stock Exchange: STM: Designs and manufactures semiconductor integrated circuits for electronics applications.
10+ YOEBachelor's in Electronic Engineering, 10+ years analog IC design experience, proficiency with Cadence Virtuoso and Mentor Graphics, EM/ESD awareness, bench testing skills, scripting (SKILL/Perl/Python/TCL) a plus, strong communication.
Cadence Virtuoso, Mentor Graphics, SKILL, Perl, Python, TCL
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Staff Analog Design Engineer
Chandler, Arizona, United States
HybridFull Time
Renesas Electronics
Renesas ElectronicsTokyo Stock Exchange: 6723: Designs and manufactures semiconductors for automotive and industrial systems.
8+ YOETypically 8+ years analog/mixed-signal IC design experience; Bachelor's in electrical/electronics engineering; strong technical leadership, mentoring, circuit design, simulation, verification, lab evaluation, and customer-facing skills.
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3w
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Physical Design Engineer
Massachusetts or Phoenix
$91k-$149k/yr OnsiteFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
0+ YOEDesign and implement physical IC/SoC from RTL to GDS, perform synthesis/place-and-route/CTS/STA, power and noise analysis, verification and optimization using EDA tools.
EDA tools, TCL
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Senior Control System Integration & Design Engineer
Seattle or Portland or Phoenix or San Francisco
$95k-$155k/yr HybridFull Time
Brown and Caldwell
Brown and Caldwell: Provides environmental engineering services for water and infrastructure systems.
5+ YOE5+ years in control system integration/ICS/OT; PLC/SCADA/HMI design and programming; cybersecurity in ICS/OT; PE license preferred; BS in CS/Engineering.
PLC, SCADA, HMI, ICS, OT, Network security
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High Speed Analog Design Engineer
Chandler, Arizona, United States
OnsiteFull Time
NXP Semiconductors
NXP SemiconductorsNASDAQ: NXPI: Designs and manufactures semiconductors for automotive and IoT applications.
3+ YOEMS in Electrical Engineering with 3–5 years IC development experience, or PhD with 1–2 years experience; high-speed analog/mixed-signal design; Cadence tools; MATLAB/Simulink; strong SI/jitter/noise knowledge; English fluency.
Cadence Virtuoso, Cadence Spectre, MATLAB, Simulink
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Manager, Analog Design Engineering
Phoenix, Arizona, United States
OnsiteFull Time
Monolithic Power Systems
Monolithic Power SystemsNasdaq: MPWR: Provides energy-efficient integrated power semiconductor solutions for electronics.
20+ YOEBSEE or MSEE and 20+ years experience in precision analog/mixed-signal IC design, transistor-level and low-power design, ability to translate system requirements, product development experience, and strong communication and leadership skills.
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Senior Manager, Design Engineering
Waddell, Arizona, United States
OnsiteFull Time
ERMCO
ERMCO: Manufacturer of electrical distribution transformers and power solutions.
8+ YOE3+ MgmtOversee design, development, and manufacturing of three-phase transformers; lead managers and senior ICs; onsite in Waddell, AZ; BS in engineering; 8+ years in transformer design; familiar with IEEE/IEC/DOE standards.
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MTS, Power Module Design
Munich or Scottsdale
HybridFull Time
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
12+ YOEMasters in electrical/electronic/mechatronics engineering; 12+ years in power semiconductors/modules; ECAD/MCAD tools; English fluency; senior IC-level individual contributor.
PSpice, SIMetrix, Ansys EM, Ansys CFD, Solidworks, PTC Creo
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2w
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R&D Engineer Hardware 4
Chandler, Arizona, United States
$110k-$176k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
6+ YOEMSEE or PhD preferred, 6+ years industry experience, expertise in mixed-signal/analog IC design, Cadence Virtuoso, SPICE simulators, Verilog, Synopsys Liberty, Python; silicon validation and documentation experience.
Cadence Virtuoso, ADE, Spectre, Hspice, Finesim, Verilog, Synopsys Liberty, Python
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3w
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Sr. Package Layout Engineer, Annapurna Labs - AI Silicon Packaging
Tempe or Austin or Cupertino
$159k-$248k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
10+ YOEBachelor's in EE or related, 10+ years IC package layout and physical design experience, expertise with advanced packaging (2.5D/3D, WLP, RDL, TSV), package DRC/DFM, and collaboration with SI/PI and manufacturing teams.
Cadence APD/SiP, Synopsys IC Packaging, Mentor Xpedition, Python, TCL, Skill, Ravel
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