24 ic design engineer jobs at 12 companies in San Diego, CA
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PLL IC Design Engineer - TeraWave
San Diego or San Francisco or Renton or Seattle
$230k-$323k/yrOnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
7+ YOEB.S. in Electrical Engineering, 7+ years designing fractional-N PLLs/DLLs in advanced FinFET CMOS, proficiency with Spectre, AMS, MATLAB, SystemVerilog, PLL silicon characterization, and ability to work as a U.S. person.
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
2+ YOEBachelor's in engineering plus 4+ years (or MS+3 or PhD+2) in system/package design or technology engineering; expertise in advanced IC packaging (FCCSP, FCBGA, SiP, RDL, 2.5D/3D), NPI, reliability testing, FMEA/SPC, and cross-functional collaboration.
Elevate Semiconductor: Designs integrated circuits for automated semiconductor test equipment.
5+ YOEBachelor's in electrical engineering required (Master's preferred), 5+ years analog IC design experience, strong CMOS circuit design and feedback loop expertise, hands-on experience with Cadence/Mentor/Tanner and LVS/DRC, knowledge of IC design and qualification cycle.
Cadence, Mentor Graphics, Tanner, LVS, DRC, Monte Carlo, SOAC
Irvine or Carlsbad or San Jose or Valencia or Bengaluru or Munich or Israel or Singapore
$177k-$259k/yrOnsiteFull Time
MaxLinearNASDAQ: MXL: Provides radio-frequency and mixed-signal semiconductor solutions for communications.
6+ YOEHands-on analog/mixed-signal/RF IC design experience with IC tape-out, advanced CMOS process familiarity, and proven people-management and cross-functional leadership; BS+11/MS+9/PhD+6 years experience.
SemtechNASDAQ: SMTC: Produces high-performance analog and mixed-signal semiconductor products
8+ YOE8+ years embedded firmware experience for mixed-signal ICs, B.S. or M.S. in Electrical/Computer Engineering, proficiency in C/C++, assembly, Python, MCU architectures (ARM,RISC-V,STM32), and experience with test and validation.
Syntiant: Provides ultra-low-power AI processors and software for edge devices
6+ YOEMS in EE required (PhD preferred),6+ years analog/mixed-signal IC design experience for audio-frequency products, HV,A/D/D/A,micropower,CMOS fundamentals,layout knowledge,and Cadence tool experience.
Austin or Boulder or Fremont or San Diego or Santa Clara or Wilsonville
$125k-$251k/yrHybridFull Time
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
4+ YOEMSEE/BSEE and 4+ years of design experience with advanced IC package or interposer layout. Requires package design tools, scripting, Windows/Linux, and strong presentation and customer skills.
Innovator 3D IC Layout, Innovator3D IC Integrator, Xpedition, Calibre, HyperLynx, Cadence APD/SiP, Siemens XSI/i3DI, Cadence OrbitIO/ISP, Synopsys 3DIC Compiler, Microsoft Excel, TSMC InFO, CoWoS, Intel EMIB, Foveros, ASE FoCUS, Amkor SWIFT, Samsung I/H/X-Cube, Verilog, LEF/DEF, GDS, OASIS, Sigrity, SIWave, ADS, Microsoft Word, Microsoft PowerPoint, VBS, Python, Tcl, Perl, Windows, Linux
12+ YOERequires a master's degree in electrical engineering, 12+ years of RF FEM development, advanced RF power amplifier expertise, multiple IC tape-outs, and experience with GaAs, CMOS-SOI, SiGe, and GaN technologies.
Virtuoso, Cadence Spectre, Keysight ADS, EM software, Matlab, JMP
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
8+ YOEMaster's or PhD in Electrical Engineering, 8+ years in wireless PHY systems design, signal processing and communication theory, and experience with MATLAB, C/C++, fixed-point simulation, modem design, and IC testing.
Custom Silicon Management Analog Design Lead - Sensors
Austin or San Francisco or San Diego
OnsiteFull Time
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
BS degree; experience designing key analog blocks; preferred MS degree with 10+ years and project lifecycle experience; familiarity with IC processes, mixed-signal design, ESD testing, and high-volume manufacturing.
Analog circuit design, Mixed-signal design, ESD testing, IC process technologies, Power budgeting, Phase Locked Loop (PLL), Delay Locked Loop (DLL), Trans-Impedance Amplifiers, Current mirrors, DAC, ADC, LDOs
Cedar: Technology-enabled architecture firm for urban housing development.
6+ YOE6+ years engineering experience; strong IC and technical leadership; domain expertise in computational geometry, web graphics, CAD, applied AI for geometry, or architectural design tools; experience at high-performance web design platforms preferred.