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462 layout jobs at 261 companies in California

1mo
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Layout Designer
San Jose, California, United States
$46-$106/hr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
5+ YOEAS in Electronics/Electrical Engineering plus 5+ years semiconductor layout experience; deep knowledge of EDA tools (Cadence Virtuoso, Synopsys, Calibre); strong debugging, physical verification, layout and floor/planning skills; strong communication.
EDA tools, Cadence Virtuoso, Synopsys, Calibre, Agentic AI
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1mo
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Senior Layout Designer
San Jose, California, United States
$63-$120/hr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Manufacturer of semiconductor memory and data storage products.
10+ YOEAssociate degree in electronics/electrical engineering plus 10 years layout experience; deep EDA tool knowledge; strong debugging, verification, communication, and layout methodology skills.
Cadence Virtuoso, Synopsys, Calibre
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3w
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Layout Engineer - Labs
San Francisco, California, United States
$212k-$312k/yr OnsiteFull Time
DoorDash
DoorDashNASDAQ: DASH: On-demand delivery platform connecting consumers with local merchants.
8+ YOE8+ years PCB layout experience, expert Altium Designer skills, strong signal/power integrity and mixed-signal layout knowledge, DFM/IPC familiarity, and cross-functional collaboration on flight-grade hardware.
Altium Designer, SolidWorks, Creo, Gerber, ODB++
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3mo
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Mask Layout Designer
San Diego, California, United States
$41-$61/hr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
2+ YOEExperience designing custom high-frequency RF/analog chip layouts, proficiency with layout/verification tools and scripting (SKILL, Python, Perl), and ability to mentor or lead layout teams; degree and years of experience options provided.
SKILL, Python, Perl, Cadence Virtuoso XL, Cadence, Siemens Calibre DRC/ERC/LVS, LVS, rmap
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1w
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PCB Layout Engineer
Irvine, California, United States
$120k-$150k/yr OnsiteFull Time
TP-Link
TP-Link: Global manufacturer of networking hardware and smart home devices.
3+ YOE3+ years PCB layout experience, strong understanding of PCB techniques, EDA tool usage, high-speed/RF/power layout experience, ability to read schematics, and strong communication skills.
EDA, OrCAD, Allegro, Gerber, ODB++
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2w
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RFIC Layout Designer (RFIC Engineering)
Redmond or Irvine or Palo Alto
OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
1+ YOEIC layout experience for RF/analog designs, 1+ years professional layout or 3+ years without degree; skills in analog/RF layout, advanced-node processes, scripting, revision control, and Linux; ITAR eligibility required.
Skill, shell scripting, Perl, Python, Linux, GDS
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides global edge-to-cloud technology solutions and IT infrastructure services.
8+ YOE8+ years PCB layout experience, expert in Cadence Allegro, high-speed design, SI/PI and impedance control, HDI and manufacturing knowledge, ability to lead layout planning and mentor junior designers.
Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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18h
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PCB Layout Engineer
Mountain View, California, United States
$200k-$275k/yr OnsiteFull Time
DensityAI
DensityAI: Designing custom AI hardware accelerators for large language models.
8+ YOERequires 8+ years of complex high-speed, high-current PCB layout experience, constraint-driven design expertise, and hands-on experience with Cadence Allegro, Siemens Xpedition, Altium, or equivalent tools.
Cadence Allegro, Siemens Xpedition, Altium, Gerber, ODB++, IPC-2581, CoWoS, EMIB, HBM, IPC CID, IPC CID+
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1d
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Washington or Arizona or Oregon or California
$136k-$259k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEBachelor's degree in electrical engineering or equivalent experience, 5+ years of PCB layout experience, and expertise with Cadence APD or SiP, high-speed design, substrate layout, and PCB layout tools.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor, CAD
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2mo
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IC Layout engineer
Irvine, California, United States
$86k-$138k/yr OnsiteFull Time
MediaTek
MediaTekTaiwan Stock Exchange: 2454: Designs and develops system-on-chip solutions for electronic devices.
1+ YOEProficient in Virtuoso and Calibre, experience validating LVS/DRC/ERC/ANT/ESD, layout experience in high-speed/mixed-signal circuits, knowledge of N7/N5/N3 processes, Bachelor's degree required.
Virtuoso, Calibre, Cadence
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PCB Layout Engineer
San Carlos, California, United States
$128k-$160k/yr OnsiteFull Time
Cowboy Space
Cowboy Space: Building satellite-based orbital infrastructure for AI data centers.
1+ YOEBachelor's in EE/CompE/Physics or related, 1+ years PCB layout experience for multilayer/high-speed designs, familiarity with signal/power/thermal/EMI considerations, and experience with PCB design tools and manufacturability.
Altium Designer, Cadence Allegro, Mentor Graphics
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3mo
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Analog Layout Designer
Irvine, California, United States
$108k-$173k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
8+ YOE8+ years experience in analog/RF layout, floorplanning, analog module integration; Cadence tools experience; knowledge of sub-micron processes; strong debugging of DRC/LVS/antenna; FinFET experience preferred.
Cadence, TSMC processes
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2mo
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Staff Analog Layout Engineer
San Jose or Hsinchu
OnsiteFull Time
Neurophos
Neurophos: Develops high-performance photonic processors for AI inference acceleration.
3+ YOESenior/Staff level IC layout engineer with 3-8+ years in deep-submicron analog/RF layouts; strong EDA/tool experience and EM/IR knowledge.
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV
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1d
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Oregon or Arizona or Washington or California
$136k-$259k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOEBachelor's degree in electrical engineering or equivalent experience; 5+ years in PCB layout; substrate layout, Cadence APD or SiP, high-speed signal integrity, and related CAD tools required or preferred.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor
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1mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides edge-to-cloud IT infrastructure and platform services.
8+ YOE8+ years PCB layout experience; expert in Cadence Allegro and Constraint Manager; strong high-speed design, SI/PI, HDI, impedance control, and PCB manufacturing knowledge.
Cadence Design Systems, Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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1mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Providing global edge-to-cloud infrastructure and IT solutions for businesses.
8+ YOE8+ years PCB layout experience with expert Cadence Allegro proficiency, high-speed design, impedance/stackup planning, HDI, EMI/EMC, PCB fabrication knowledge, and mentoring experience.
Cadence Design Systems, Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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1w
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Digital Layout Design Engineer
San Diego, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Design custom digital ASIC layouts on advanced process nodes, create digital macros and libraries, work with integration/CAD/circuit/technology engineers, and apply engineering fundamentals to turn ideas into silicon.
CAD
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3w
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PCB Layout Designer III
Seattle or Los Angeles or Brevard County
$104k-$146k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOE5+ years PCB layout experience in aerospace/defense, expert Altium use, IPC standards knowledge, HDI and high-speed/high-power design experience, library management, and ability to mentor others.
Altium Designer, IPC-6012, IPC-7352, Siemens Valor, Siemens HyperLynx, Git, AWS GovCloud, Python, Perl, DelphiScript, Quilter, Darcy
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3w
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Layout Design Engineer (SRAM)
Santa Clara, California, United States
$45k-$121k/yr OnsiteFull Time
Wipro
WiproNYSE: WIT: Global technology services and consulting for digital transformation.
10+ YOEBSEE or equivalent, 10+ years custom IC layout experience with 5+ years in SRAM/memory IP, advanced-node (FinFET/GAA) experience, Cadence Virtuoso and Calibre/ICV proficiency, DRC/LVS debugging, mentoring ability.
Cadence Virtuoso, Calibre, ICV
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Principal Analog Layout Engineer
San Diego, California, United States
$152k-$225k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
8+ YOEDrawing layouts for analog/mixed-signal schematics using Cadence Virtuoso VXL or Synopsys Custom Compiler, resolving PV issues with Calibre, strong communication and problem-solving; advanced degree plus 8+ years experience preferred.
Cadence Virtuoso VXL, Synopsys Custom Compiler, Mentor Graphics Calibre
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