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229 layout engineer jobs at 102 companies in Berkeley, CA

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Layout Engineer - Labs
San Francisco, California, United States
$212k-$312k/yr OnsiteFull Time
DoorDash
DoorDashNASDAQ: DASH: On-demand delivery platform connecting consumers with local merchants.
8+ YOE8+ years PCB layout experience, expert Altium Designer skills, strong signal/power integrity and mixed-signal layout knowledge, DFM/IPC familiarity, and cross-functional collaboration on flight-grade hardware.
Altium Designer, SolidWorks, Creo, Gerber, ODB++
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3mo
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Analog Layout Automation Engineer
Cupertino, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Bachelor's in Electrical Engineering; experience in analog/mixed-signal layout automation, scripting, CAD tools, and AI/ML for layout optimization.
Python, Perl, TCL, Shell, SKILL, PyTorch, Cadence Virtuoso, Cadence Innovus, PCell, CAD automation
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1mo
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Staff Analog Layout Engineer
San Jose or Hsinchu
OnsiteFull Time
Neurophos
Neurophos: Develops high-performance photonic processors for AI inference acceleration.
3+ YOESenior/Staff level IC layout engineer with 3-8+ years in deep-submicron analog/RF layouts; strong EDA/tool experience and EM/IR knowledge.
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV
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2w
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PCB Layout Engineer
San Carlos, California, United States
$128k-$160k/yr OnsiteFull Time
Cowboy Space
Cowboy Space: Building satellite-based orbital infrastructure for AI data centers.
1+ YOEBachelor's in EE/CompE/Physics or related, 1+ years PCB layout experience for multilayer/high-speed designs, familiarity with signal/power/thermal/EMI considerations, and experience with PCB design tools and manufacturability.
Altium Designer, Cadence Allegro, Mentor Graphics
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2w
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PCB Layout Engineer
Sunnyvale, California, United States
$144k-$204k/yr OnsiteFull Time
Meta
MetaNASDAQ: META: Develops social networking platforms and virtual reality technologies.
6+ YOE6+ years PCB layout experience for high-speed, HDI, and rigid‑flex designs; experience with DDR/PCIe/USB/MIPI interfaces; collaboration with electrical/mechanical teams; proficiency with Cadence Allegro or Mentor Xpedition.
Cadence Allegro, Mentor Xpedition, HyperLynx, Sigrity
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1mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides global edge-to-cloud technology solutions and IT infrastructure services.
8+ YOE8+ years PCB layout experience, expert in Cadence Allegro, high-speed design, SI/PI and impedance control, HDI and manufacturing knowledge, ability to lead layout planning and mentor junior designers.
Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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1mo
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Washington or Arizona or Oregon or California
$136k-$259k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEB.S. in Electrical Engineering (or equivalent), 5+ years PCB/layout experience (graphics cards, motherboards, HDI preferred), substrate layout experience, Cadence APD/SiP and Constraint Manager experience, high-speed signal integrity knowledge; Virtuoso/Calibre/Valor a plus.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor
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2mo
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Analog IC Layout Engineer
Fremont, California, United States
$83k-$139k/yr OnsiteFull Time
Neuralink
Neuralink: Developing implantable brain-computer interfaces to restore human capabilities.
2+ YOE2+ years analog/mixed-signal IC layout; 1+ year FinFET; problem-solving ability; strong layout skills.
Analog layout, Mixed-signal layout, SKILL, TCL, Shell, C/C++, Python
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1mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides edge-to-cloud IT infrastructure and platform services.
8+ YOE8+ years PCB layout experience; expert in Cadence Allegro and Constraint Manager; strong high-speed design, SI/PI, HDI, impedance control, and PCB manufacturing knowledge.
Cadence Design Systems, Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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1mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Providing global edge-to-cloud infrastructure and IT solutions for businesses.
8+ YOE8+ years PCB layout experience with expert Cadence Allegro proficiency, high-speed design, impedance/stackup planning, HDI, EMI/EMC, PCB fabrication knowledge, and mentoring experience.
Cadence Design Systems, Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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Electrical PCB Layout Engineer
South San Francisco, California, United States
OnsiteFull Time
Zipline
Zipline: Operates an autonomous drone delivery system for medical supplies.
Experienced PCB layout engineer skilled in Altium from schematic handoff through fabrication and assembly release, with knowledge of high-/low-speed, power, EMI/thermal, DFM/DFA, and cross-functional collaboration.
Altium Designer, Gerbers, ODB++
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1w
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Layout Design Engineer (SRAM)
Santa Clara, California, United States
$45k-$121k/yr OnsiteFull Time
Wipro
WiproNYSE: WIT: Global technology services and consulting for digital transformation.
10+ YOEBSEE or equivalent, 10+ years custom IC layout experience with 5+ years in SRAM/memory IP, advanced-node (FinFET/GAA) experience, Cadence Virtuoso and Calibre/ICV proficiency, DRC/LVS debugging, mentoring ability.
Cadence Virtuoso, Calibre, ICV
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3mo
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Substrate/Package Layout Engineer
San Jose, California, United States
$141k-$226k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
12+ YOEBachelor's or higher in an engineering field with extensive Cadence/EDA experience; 12+ years (Bachelor path) or 10+ years (Master path) or 7+ years (PhD path); expertise in multilayer high-speed RF layout and DRC/LVS
Cadence, Calibre, KLayout, Allegro, Innovus, Virtuoso
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3mo
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Sr PCB Layout Engineer, Amazon Leo
Redmond or Austin or Sunnyvale or New York or San Diego
$137k-$186k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
7+ YOE7+ years PCB layout, high-speed circuits, multi-project management; Bachelor’s in Electrical/Computer Engineering or equivalent; Mentor Xpedition experience preferred.
Mentor Xpedition, PCB design software
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2mo
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Senior Photonic Layout Design Engineer
Santa Clara, California, United States
$132k-$236k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
6+ YOEBS/MS/PhD in Electrical Engineering or Physics; 6+ years full-chip layout experience; Cadence Virtuoso; silicon photonics; layout automation scripting; DRC/LVS proficiency.
Cadence Virtuoso, Calibre, ICV, Dracula, PrimeYield, Python, SKILL, Perl, TCL, C++
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1mo
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Layout Designer
San Jose, California, United States
$46-$106/hr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
5+ YOEAS in Electronics/Electrical Engineering plus 5+ years semiconductor layout experience; deep knowledge of EDA tools (Cadence Virtuoso, Synopsys, Calibre); strong debugging, physical verification, layout and floor/planning skills; strong communication.
EDA tools, Cadence Virtuoso, Synopsys, Calibre, Agentic AI
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1mo
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Layout Verification / PEX Engineer
Palo Alto, California, United States
$150k-$170k/yr OnsiteFull Time
PsiQuantum
PsiQuantum: Builds fault-tolerant quantum computers using silicon photonics technology.
Bachelor's in EE/Physics/Microelectronics or equivalent; basic IC layout and verification knowledge; exposure to DRC/LVS/pex; familiarity with Linux/Unix; attention to detail and communication skills; interest in quantum computing.
Cadence Virtuoso, Siemens Calibre, Cadence Pegasus/PVS, Cadence Quantus, Python, Linux, Unix, EDA tools
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1mo
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Staff Custom Analog Layout Engineer
San Jose or United States
$139k-$259k/yr HybridFull Time
Nokia
NokiaNYSE: NOK: Sells telecommunications infrastructure and software for global network operators.
10+ YOEBS degree or equivalent; 10+ years in analog/mixed-signal layout design; proficient with layout tools and DRC/LVS/ERC flows.
Virtuoso, Laker, Calibre, PVS, IC Validator, DRC/LVS/ERC tools, RC extraction, EM/IR analysis
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4w
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Staff PCB Layout Design Engineer
Mountain View or Sunnyvale
$218k-$245k/yr HybridFull Time
General Motors
General MotorsNYSE: GM: Manufactures and sells automobiles and automotive parts globally.
10+ YOEBachelor's in engineering required; 10 years experience in PCB layout and related roles; 8 years with design tools including Mentor Graphics; experience with HDI, high-power boards, high-speed buses, DFM/DFT, and leading design/supplier teams.
Mentor Graphics, ECAD
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2w
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Senior Layout Designer
San Jose, California, United States
$63-$120/hr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Manufacturer of semiconductor memory and data storage products.
10+ YOEAssociate degree in electronics/electrical engineering plus 10 years layout experience; deep EDA tool knowledge; strong debugging, verification, communication, and layout methodology skills.
Cadence Virtuoso, Synopsys, Calibre
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