Pacific Grove • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Pacific Grove • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Pacific Grove • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Pacific Grove • 50 milesRemote · Hybrid · Onsite · Field · All Environments
77 layout engineer jobs at 31 companies in Pacific Grove, CA
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Staff Analog Layout Engineer
San Jose or Hsinchu
OnsiteFull Time
3+ YOESenior/Staff level IC layout engineer with 3-8+ years in deep-submicron analog/RF layouts; strong EDA/tool experience and EM/IR knowledge.
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV
6d
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Staff Engineer, PCB Layout
San Jose, California, United States
$150k-$240k/yr OnsiteFull Time
7+ YOE7+ years PCB layout experience with Cadence Allegro (16.x/17.x), high-density and high-speed designs, knowledge of PCB/PCBA manufacturing, IPC standards, signal integrity, EMC/EMI; bachelor's degree or equivalent.
Cadence Allegro, Valor Trilogy 5000
1w
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Senior / Principal Layout Engineer – Module Architecture (Pathfinding)
San Jose, California, United States
$202k-$344k/yr OnsiteFull Time
8+ YOEBachelor's in Electrical Engineering,8+ years high-speed PCB layout experience, expertise in DDR/LPDDR, SI/PI and PDN, proficiency with Cadence Allegro/OrCAD and AI tools, ability to influence architecture decisions.
Cadence Allegro, OrCAD, AI tools
1w
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Senior / Principal Layout Engineer – Module Architecture (Pathfinding)
San Jose, California, United States
$202k-$344k/yr OnsiteFull Time
8+ YOE8+ years high-speed PCB/layout experience, expertise in DDR/LPDDR interfaces, SI/PI and PDN, proficiency with Cadence Allegro/OrCAD, and experience influencing architecture decisions in pathfinding environments.
Cadence Allegro, OrCAD, AI tools
2mo
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Staff Custom Analog Layout Engineer
San Jose or United States
$139k-$259k/yr HybridFull Time
10+ YOEBS degree or equivalent; 10+ years in analog/mixed-signal layout design; proficient with layout tools and DRC/LVS/ERC flows.
Virtuoso, Laker, Calibre, PVS, IC Validator, DRC/LVS/ERC tools, RC extraction, EM/IR analysis
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Sr. Package Layout Engineer, Annapurna Labs - AI Silicon Packaging
Tempe or Austin or Cupertino
$159k-$248k/yr OnsiteFull Time
10+ YOEBachelor's in EE or related, 10+ years IC package layout and physical design experience, expertise with advanced packaging (2.5D/3D, WLP, RDL, TSV), package DRC/DFM, and collaboration with SI/PI and manufacturing teams.
Cadence APD/SiP, Synopsys IC Packaging, Mentor Xpedition, Python, TCL, Skill, Ravel
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Principal/Senior High-Speed Analog Layout Engineer
Irvine or San Jose or Ottawa
OnsiteFull Time
10+ YOE10+ years analog/mixed-signal layout experience in advanced CMOS/FinFET (TSMC preferred), expertise with Cadence Virtuoso, Calibre, Pegasus, LVS/DRC/PERC/ERC flows, and leadership/mentoring experience; scripting with SKILL/TCL/Python a plus.
Cadence Virtuoso, Calibre, Pegasus, SKILL, TCL, Python
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IC Package Layout Team Leader
San Jose, California, United States
$211k-$305k/yr HybridFull Time
5+ YOEDegree in electrical engineering with relevant experience, 5+ years package/layout experience, high-speed routing and PDN knowledge, EDA tool proficiency, and leadership/mentorship experience.
Cadence APD+, Python, Perl, TCL
1w
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Sr. Staff Engineer, Analog/Mixed-Signal Design
San Jose, California, United States
$180k-$223k/yr OnsiteFull Time
6+ YOEM.S. in Electrical Engineering,6+ years analog/mixed-signal design,experience with high-speed analog blocks and FinFET CMOS,proficient with Cadence/ADE/Layout/Spectre;Python and SKILL preferred.
Cadence, ADE, Layout, Spectre, Python, SKILL
1d
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Packaging Design Engineer
San Jose or San Diego
HybridFull Time
Experienced package engineer with CAD/simulation tool proficiency, package/PCB layout and power integrity expertise, scripting ability, and engineering degree.
Cadence, SKILL, Ansys, AutoCAD
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Hardware Design Engineer
San Jose, California, United States
$91k-$105k/yr OnsiteFull Time
Design and test server motherboards and add-on cards; schematics capture, PCB layout, BOM creation, debugging, and documentation. Bachelor's in electrical engineering preferred; strong circuit and PCB knowledge required.
1mo
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Hardware Engineer, Power Management / Battery / BMS
San Jose, California, United States
$160k-$190k/yr OnsiteFull Time
0+ YOEDegree in Electrical or Computer Engineering, 0–3 years hardware design experience (power management/battery/BMS preferred), Cadence experience for schematic/PCB layout, US Person required.
Cadence
3w
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Sr. Technology Development Engineer
San Jose, California, United States
OnsiteFull Time
3+ YOEMaster's degree with 3+ years or Ph.D. in electrical engineering; expertise in analog process/device development for DMOS/Bipolar/CMOS/high-voltage devices, device physics, simulation, design rules, and mask/layout requirements.
CAD, SPICE
3w
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Principal Thermal Mechanical Engineer
San Jose, California, United States
$137k-$254k/yr OnsiteFull Time
BS/MS/PhD in mechanical engineering with 2–7+ years experience; expertise in thermal/mechanical design for data center equipment, CFD thermal analysis, air/liquid cooling, PCB layout, CAD, BOM/ECO processes.
CFD, Creo Elements/Direct, PTC Arena, PDM
1mo
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Senior Analog Design Engineer
San Jose, California, United States
$120k-$180k/yr OnsiteFull Time
5+ YOEM.S. or Ph.D. in Electrical Engineering, 5+ years IC development with advanced CMOS/FinFET, strong analog/mixed-signal circuit knowledge, proficiency with Cadence Virtuoso, Synopsys Custom Compiler, MATLAB, Verilog, and hands-on design/layout/verification experience.
Cadence Virtuoso, Synopsys Custom Compiler, MATLAB, Verilog
1w
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Development Engineer
Racine or Mount Pleasant or San Jose
OnsiteFull Time
MSEE/CE/CS required. Design high-speed electronic connectors, schematic work in OrCAD, PCB layout in Cadence Allegro, fixture design for USB/SATA/OSFP/QSFP, coordinate technical and marketing teams, and research new technologies.
OrCAD, Cadence Allegro, USB, SATA, OSFP, QSFP
3w
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Staff Hardware Systems Design Engineer
Campbell, California, United States
$150k-$180k/yr OnsiteFull Time
10+ YOEB.S. in Electrical Engineering required (M.S. preferred); 10+ years hardware design experience; track record leading complex hardware projects; experience with circuit design, PCB layout, testing, and lab equipment.
Oscilloscope, Logic Analyzer
1w
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System Architecture Engineer
San Jose, California, United States
$127k-$175k/yr OnsiteFull Time
2+ YOEBachelor's in EE or related, 2+ years in power electronics, expertise in high-voltage power converters, PCB layout, test equipment, soldering, and EDA/simulation tools.
Cadence Allegro, Altium Designer, Simetrix/Simplis, Mathcad, PLECS, PSIM, Gerber, BOM, oscilloscopes, thermal cameras, programmable DC power supplies, electronic loads
1mo
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Senior/Staff Power Electronics Engineer
Scotts Valley, California, United States
$120k-$200k/yr OnsiteFull Time
3+ YOEDegree in electrical engineering or equivalent experience, minimum 3 years hands-on power converter design/prototyping/industrialization, proficiency with power semiconductor devices, magnetic design, PCB layout, simulation tools and lab instrumentation; US work authorization required.
SPICE, PLECS, LTspice, Simulink, Python, LabVIEW, oscilloscopes, network analyzers, power analyzers
1mo
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Staff Engineer, Test
San Jose, California, United States
$140k-$175k/yr HybridFull Time
8+ YOEBachelor's in EE/CE or related plus 10+ years semiconductor test experience (or MS/PhD with 8+ years). Deep ATE architecture experience, mixed-signal/power test, C++ and Python programming, lab instrumentation, PCB layout, and technical leadership.
ATE, Advantest V93K, COHU Diamondx, SPEA DOT800, ETS364, C++, Python, Oscilloscope, Spectrum Analyzer, Source Measure Unit