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Sr Packaging Engineer
Santa Clara, California, United States
$134k-$184k/yr OnsiteFull Time
Experience in packaging engineering including supplier management, test plan development and lab testing, Design for Transportability (DFT), packaging standards, continuous improvement, and ability to lead projects.
2mo
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Advanced Packaging Engineer
Mountain View, California, United States
$200k-$350k/yr OnsiteFull Time
10+ YOE10+ years in advanced multi-die packaging (SiP, CoWoS, EMIB, interposers); expertise in design layout, SI/PI, thermo-mechanical tradeoffs; hands-on with packaging flows for 2.5D/3D; ability to collaborate with architects; DFT/RTL/PD optional.
1mo
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Sr Packaging Engineer
Santa Clara, California, United States
$134k-$184k/yr OnsiteFull Time
Packaging engineering experience with supplier management, test plan development, Design For Transportability (DFT), standards development, continuous improvement, and ability to train others; travel ~10%.
2mo
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Packaging Design Engineer I
San Jose or Hayward or Texas
OnsiteFull Time
TransPak: Packaging solutions provider
2+ YOEBachelor’s in mechanical/manufacturing/industrial/packaging engineering; 2-3 years mechanical/structural design experience; CAD (SolidWorks/AutoCAD); GD&T knowledge; packaging design and testing experience; strong communication.
SolidWorks, AutoCAD, NX, BOM, 3D modeling, 2D drawings, GD&T
1mo
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Lead Packaging Engineer
Palo Alto or Los Angeles or Boston or Chicago or Sydney
$200k-$260k/yr OnsiteFull Time
Bachelor's in engineering or materials science, significant semiconductor packaging experience, expertise in PCB/substrate and mechanical design, failure analysis, thermal management, and delivering scalable hardware from concept to manufacturing.
1mo
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Principal Packaging Engineer
Palo Alto or United States or Canada
$180k-$240k/yr HybridFull Time
B.S./M.S. in EE or related, expertise in multi-die package design and UCIe, substrate and SI/PI knowledge, experience with TSMC/OSAT and managing subcontractors; HFSS/Sigrity familiarity a plus.
HFSS, Sigrity, UCIe
2mo
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Senior, Packaging Design Engineer
Sunnyvale, California, United States
$163k-$199k/yr OnsiteFull Time
8+ YOE8+ years in medical device packaging design; BS in Packaging/Mechanical/Industrial Engineering; experience with thermoforming, pouch sealing, ISO11607, CFR 820; CAD (SolidWorks); travel; strong communication.
SolidWorks, FEA, Packaging testing tools, MS Office
12h
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Packaging Design Engineer
San Jose or San Diego
HybridFull Time
Experienced package engineer with CAD/simulation tool proficiency, package/PCB layout and power integrity expertise, scripting ability, and engineering degree.
Cadence, SKILL, Ansys, AutoCAD
2w
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Senior IC Packaging Engineer
Hillsboro or Redmond or Mountain View or Raleigh or Austin
$120k-$235k/yr HybridFull Time
1+ YOEAdvanced IC packaging expertise with experience in 2.5D/3D packaging, substrate/interposer design, supplier management, reliability assessment, and EDA/PCB layout tools; advanced degree or equivalent experience required.
Cadence Allegro
1w
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Principal Packaging Engineer, Optical Interfaces
Santa Clara, California, United States
$145k-$255k/yr OnsiteFull Time
10+ YOE10+ years packaging design experience for optical/photonic components, experience with PIC edge coupling, reliability engineering, CAD and FEA usage, and working with contract manufacturers.
CAD, FEA
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Staff Semi Packaging Engineer
San Jose, California, United States
$130k-$188k/yr OnsiteFull Time
3+ YOEMaster's in a relevant engineering field + ≥3 years industrial IC/package experience; expertise in analog IC package/module design, reliability and BOM selection, CAD modeling, and process development (FMEA, SPC, DOE); OSAT collaboration experience.
CAD
2mo
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Photonic Packaging Engineer, Principal
San Jose, California, United States
OnsiteFull Time
10+ YOEPh.D. or M.S. in EE, Physics, Materials Science, Mechanical Engineering, or related field; 10+ years in photonic packaging or related areas; strong expertise in high-speed packaging, thermal management, and optomechanical design.
2w
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Advanced Packaging Design Engineer
Santa Clara or Chandler
$192k-$287k/yr OnsiteFull Time
5+ YOEBS/MS/PhD in engineering,5-10 years advanced packaging design experience, expertise with Cadence APD, high-speed interfaces, substrate and assembly processes, and cross-functional collaboration.
Cadence APD, AutoCAD
1w
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Senior Engineering Program Manager – Device Packaging, Devices & Services Experience Design
Sunnyvale or San Francisco
$156k-$212k/yr OnsiteFull Time
9+ YOE9+ years design or packaging program experience; end-to-end packaging development, BOM and POD labeling knowledge; strong cross-functional program management and travel availability.
Bill of Material (BOM), Print On Demand (POD), scrum
3w
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Senior Fiber Optic Module Packaging Engineer
Sunnyvale, California, United States
$92k-$150k/yr OnsiteFull Time
2+ YOEBS/MS in telecom/optomechanical engineering, physics or related; minimum 2 years' related experience; SolidWorks and MS Office proficiency; experience with telecom fibers, materials selection, packaging design, testing, and manufacturing transfer.
SolidWorks, Word, Excel, Outlook, PowerPoint
3d
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Materials Engineer, Packaging Product Design
Cupertino, California, United States
OnsiteFull Time
Design and execute structural packaging for products and shippers, collaborate with cross-functional teams to protect products and support sustainability goals.
2mo
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Software Engineer 6 - Ads Pricing & Packaging
Los Gatos or New York
$499k-$900k/yr OnsiteFull Time
10+ YOE10+ years software development experience (5+ years on inventory management); expertise in yield optimization, dynamic pricing, auction mechanics, rate card and packaging systems; API and data model design; technical leadership and strong communication.
VAST, OpenRTB
1mo
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ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yr RemoteFull Time
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
Cadence Sigrity, Ansys HFSS, Keysight ADS, Cadence APD, Ansys EM, SPICE, Vector Network Analysis, IBIS
1mo
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Senior Signal Integrity Engineer – LPU Packaging
Santa Clara, California, United States
$168k-$311k/yr HybridFull Time
8+ YOEBS/MS/PhD in EE or equivalent, 8+ years in signal integrity/high-speed interconnects, SerDes/channel design, electromagnetics, simulation-to-measurement correlation using VNA/TDR/scope, and experience with industry SI tools.
Ansys HFSS, SIwave, Cadence Sigrity, ADS, HSPICE, IBIS-AMI, S-parameters, VNA, TDR, oscilloscope
1mo
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Staff Software Engineer, Pricing and Packaging Engineering
San Francisco or Denver or New York City or San Jose
$197k-$247k/yr HybridFull Time
8+ YOE8+ years building large-scale backend platform systems (commerce/billing/subscriptions preferred); strong distributed systems, API design, SLO, and mentorship experience; proven delivery of multi-quarter projects.
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