HiringCafe
Join our community

27 rtl engineer jobs at 7 companies in Roseville, CA

1w
Save
Mark Applied
Hide
HBM SoC RTL Design Engineer
Folsom, California, United States
$121k-$247k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
3+ YOE3+ years SoC/RTL design experience, proficiency in SystemVerilog/Verilog, RTL-to-GDS flow knowledge, familiarity with EDA toolchains, scripting (Python/TCL/Perl/shell), and SoC integration skills.
SystemVerilog, Verilog, Cadence, Synopsys, Siemens, Python, TCL, Perl, shell, Palladium, Veloce, Zebu
Job PostingView all
1w
Save
Mark Applied
Hide
HBM SoC RTL Design Engineer
Folsom, California, United States
$121k-$247k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Manufacturer of semiconductor memory and data storage products.
3+ YOEBachelor's or master's in EE/Computer Engineering with 3+ years experience, proficiency in SystemVerilog/Verilog, RTL‑to‑GDS flow, EDA tools, and scripting (Python/TCL/Perl/shell).
SystemVerilog, Verilog, Cadence, Synopsys, Siemens, Python, Tcl, Perl, Shell, Palladium, Veloce, Zebu
Job PostingView all
3mo
Save
Mark Applied
Hide
Sr. ASIC Design Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides global edge-to-cloud technology solutions and IT infrastructure services.
5+ YOEDesign ASICs with Verilog/SystemVerilog, RTL, timing, verification; collaborate with verification and physical design; 5+ years of relevant experience.
Verilog, SystemVerilog, RTL, SVA, EDA tools, Python, Perl
Job PostingView all
1mo
Save
Mark Applied
Hide
IP Logic Design Engineer
Rancho Cordova, California, United States
$105k-$165k/yr OnsiteFull Time
Solidigm
Solidigm: Develops and manufactures NAND flash memory and solid-state drives.
7+ YOEMS in ECE with 7+ years or BS with 9+ years; expertise in Verilog/SystemVerilog and ASIC flow (RTL, synthesis, STA, ECO); experience with lint, CDC/RDC analysis, verification tools, scripting, and pre/post-silicon debug; 3D NAND experience preferred.
SystemVerilog, Verilog, RTL, synthesis, Static Timing Analysis (STA), ECO, lint tools, CDC/RDC analysis, SystemVerilog Assertions (SVAs), Gate-level simulation (GLS), Design for Testability (DFT)
Job PostingView all
3d
Save
Mark Applied
Hide
Principal Engineer - Design
Roseville, California, United States
$75k-$232k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
10+ YOE10+ years experience in SoC design/verification, BS/MS in Electrical/Computer Engineering, experience with serial protocols (SAS/SATA/NVMe, PCIe), Linux and C/Python scripting, RTL (VHDL/Verilog/System Verilog).
Cadence Palladium, Protium, Linux, C, Python, Tcl, Bash, VHDL, Verilog, System Verilog, JTAG, I2C
Job PostingView all
3mo
Save
Mark Applied
Hide
Sr. ASIC Design Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides edge-to-cloud IT infrastructure and platform services.
5+ YOE5+ years in ASIC/SoC design with Verilog/SystemVerilog, RTL, timing closure, verification; strong problem-solving and communications.
Verilog, SystemVerilog, EDA tools, Synthesis, SVA, Python, Perl
Job PostingView all
2w
Save
Mark Applied
Hide
Principal Engineer, SOC Design
Folsom, California, United States
$199k-$319k/yr OnsiteFull Time
Samsung Semiconductor
Samsung SemiconductorKorea Exchange: 005930: Designs and manufactures memory chips, processors, and sensors.
15+ YOEExtensive SoC architecture and RTL development experience with modern DRAM technologies, verification/debugging skills, FPGA prototyping or silicon bring-up experience, and strong technical leadership.
SystemVerilog, Verilog, FPGA
Job PostingView all
2mo
Save
Mark Applied
Hide
Mixed Signal Logic Design Engineer
Folsom or San Jose or Santa Clara
$122k-$232k/yr OnsiteFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
4+ YOEBachelor's with 4+ years or Master's with 3+ years or PhD with 1+ year in CS/CE/EE; 2+ years RTL design SystemVerilog/Verilog; mixed-signal, UPF, clock gating; VCS/Verdi; FE tools; no visa sponsorship.
SystemVerilog, Verilog, VCS, Verdi, UPF, Lint, CDC, RDC, Synthesis, Voltage Domain Crossings, DDR, LPDDR, VSCode, Git
Job PostingView all
20h
Save
Mark Applied
Hide
GPU Performance Architect
Folsom, California, United States
$106k-$152k/yr HybridFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
Undergraduate degree required; preferred background in electrical engineering, computer architecture, or computer science, with experience in GPU performance analysis, AI/ML algorithms, simulation, and programming.
PyTorch, Triton, CUDA, HIP, C, C++, Python, DirectX, Vulkan, PIX, RenderDoc, RTL, AI, ML
Job PostingView all

Explore Jobs

Expand Your Job Search