306 soc engineer jobs at 62 companies in Lathrop, CA
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Senior SOC Design Engineer
Santa Clara, California, United States
$136k-$265k/yr HybridFull Time
3+ YOEBS/MS in Computer or Electrical Engineering (or equivalent), 3+ years chip design experience focused on SoC integration and automation; expertise in RTL, SOC integration, design automation; scripting with Perl or Python; strong analytical and communication skills.
Perl, Python, RTL, EDA tools
1w
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Principal Engineer, SOC Integration
San Jose, California, United States
$219k-$351k/yr OnsiteFull Time
18+ YOEBS/MS in Computer/Electrical Engineering or CS with extensive ASIC/SoC experience (18+ years MS or 20+ years BS). Hands-on ASIC tape-out, commercial IPs (UCIe, CPU, DDR, Ethernet), SoC synthesis/timing/DFT, AMBA/ARM experience.
UCIe, ARM, DDR, Ethernet, AMBA, DFT, CDC
2w
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SoC Verification Engineer
Austin or Santa Clara or Hillsboro
$142k-$200k/yr HybridFull Time
3+ YOE3+ years SoC design verification experience (4+ with bachelor's) with OVM/UVM, AMBA protocols, UVM testbench creation, debugging, and test planning; bachelor's or master's in EE/CE/CS or related.
OVM, UVM, CHI, AXI, AHB, APB, VIP, emulation models, system simulation tools
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SoC Design Engineer
Santa Clara, California, United States
$157k-$160k/yr OnsiteFull Time
1+ YOEMaster's in Electrical or Computer Engineering required, 1+ year digital design experience; RTL/Verilog, SystemVerilog/SVA, Python, Perl; experience with Synopsys PrimeTime, Cadence Virtuoso, Design Compiler, Integrator; FPGA prototyping, STA, DFT.
Synopsys PrimeTime, Cadence Virtuoso, Design Compiler, Integrator, SystemVerilog, SVA, Python, Perl, Verilog, FPGA
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Sr. Principal Engineer, SoC Architect
San Jose, California, United States
$250k-$304k/yr OnsiteFull Time
15+ YOE15+ years in SoC/system architecture; strong high-speed I/O and interconnect knowledge; leadership, cross-functional collaboration.
PCIe, PCIe Gen5, PCIe Gen6, CXL/UCIe, HBM, SerDes, Ethernet, USB, Memory interconnect, Interconnect
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SoC Architect
San Jose, California, United States
$323k-$437k/yr HybridFull Time
10+ YOE10+ years in semiconductor SoC architecture, Bachelor's or Master's in Electrical/Computer Engineering, expertise in interconnect, power, caching, packaging, memory and performance/power modeling, strong communication and influencing skills.
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SoC Architect
San Jose or United States
$175k-$350k/yr HybridFull Time
18+ YOEBachelor's/Master's/PhD in EE/Computer Engineering or related; 18+ years in SoC/system architecture; expertise in high-speed IO, data movement, performance modeling, and cross-functional collaboration.
UCIe, PCIe, CXL, UALink, ESUN, Ethernet
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SoC Architect
Santa Clara, California, United States
$175k-$265k/yr HybridFull Time
d-Matrix: Develops high-performance semiconductor chips for generative AI inference.
5+ YOEMS in CS/ECE or related with 5+ years in SoC/compute architecture; expert in AI SoC architecture, performance modeling, ML (transformer/CNN/RNN), workload analysis; strong Python; C/C++ preferred; leadership in architecture delivery.
Python, C, C++
3mo
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Senior Staff SoC Design Engineer
Santa Clara, California, United States
$134k-$201k/yr OnsiteFull Time
5+ YOEBachelor's in CS/EE with 5-10 years; or Master's/PhD with 3-5 years; strong SystemVerilog RTL; SoC integration; AMBA AXI; scripting (Python/Tcl).
SystemVerilog, AMBA AXI, Python, Tcl, Synthesis, CDC/RDC, UCIe, UALink
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SoC Verification Lead
Santa Clara, California, United States
$232k-$368k/yr OnsiteFull Time
15+ YOE15+ years of ASIC/SoC functional verification experience; Bachelor's/Master's in EE/CE or equivalent; proficiency in SystemVerilog, UVM, C/C++; experience leading verification to tape-out and managing verification plans, schedules, and risk.
SystemVerilog, UVM, C, C++, EDA
2w
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SOC Verification and Methodology Engineer - SCL
Santa Clara, California, United States
$153k-$230k/yr OnsiteFull Time
2+ YOEDevelop and implement SOC verification methodologies, create and execute test plans, debug issues; requires SystemVerilog/UVM experience and design verification background.
SystemVerilog, UVM, Perl, Python
3w
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Principal SoC Architect
Walnut Creek, California, United States
$168k-$300k/yr OnsiteFull Time
12+ YOEBachelor's in EE/CE,12+ years ARM CPU SoC/ASIC architecture experience, Ethernet/PCIe and memory subsystem expertise, EM/thermal tradeoff and IP selection experience, scripting in Tcl/Perl/Python preferred.
Tcl, Perl, Python
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SoC Security Architect
Santa Clara or Austin or Boston
$203k-$348k/yr OnsiteFull Time
Experienced systems architect for SoC security design, threat modeling, vulnerability assessment, cryptography, secure boot/TEE, standards participation, cross-functional leadership, and strong technical writing. BS/MS in relevant engineering/CS field preferred.
Linux, Windows
5d
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Datacenter Compute SoC Architect
San Jose or San Diego or Portland or Austin
$211k-$356k/yr OnsiteFull Time
10+ YOE10+ years SoC/compute architecture experience, 3+ years in datacenter/server SoCs; Bachelor’s degree in EE/CE/CS; expertise in CPU/memory/Interconnect, PCIe/CXL, and performance modeling.
C++, SystemC, UCIe, PCIe, CXL, ARM AMBA CHI, AXI
3w
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SoC Digital Verification Engineer, Multimedia Lab
San Jose, California, United States
$156k-$317k/yr OnsiteFull Time
1+ YOEBachelor's in a related field,1+ years ASIC/SoC verification experience,mastery of SystemVerilog and UVM,proficiency with simulation/debug tools and Python/Perl/Shell scripting.
SystemVerilog, UVM, VCS, Incisive, Questa, Verdi, Python, Perl, Shell, Palladium, ZeBu, JasperGold, FPGA, ASIC
6h
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Senior Principal Engineer- SoC/Chip Lead
San Jose, California, United States
HybridFull Time
20+ years semiconductor experience; leadership as SoC/Chip Lead; expertise in SoC architecture, RTL, verification, physical design, DFT, STA, low-power, silicon bring-up, SerDes and packaging; BS/MS/PhD in EE/CE.
UALink, Ethernet
2mo
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SoC Physical Design Verification Engineer
San Jose, California, United States
OnsiteFull Time
Experience in physical verification of system-on-chip (SoC) designs and semiconductor implementation; ability to craft solutions for high-performance, power-efficient processors.
2mo
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Sr. Principal SoC Architect (AI2501)
San Jose, California, United States
$231k-$358k/yr OnsiteFull Time
20+ YOEMS or PhD in EE/CS, 20+ years developing hardware-focused products, 3+ years architecting and tape-out of complex ML SoCs, strong ML/math foundation, HW/SW co-design and industry/publication experience.
2mo
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SoC Architecture and Design Engineer, Senior Member of Technical Staff (SMTS)
Richardson or Folsom
$177k-$334k/yr OnsiteFull Time
15+ YOEBachelors or Masters in electrical/computer engineering; 15+ years in related field; SystemVerilog/Verilog; RTL-to-GDS flow; Cadence/Synopsys/Siemens; Python/TCL/Perl.
SystemVerilog, Verilog, RTL, EDA tools (Cadence, Synopsys, Siemens), Python, TCL, Perl
3mo
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Staff/Principal Engineer - Design Verification (SoC expert/lead)
San Jose, California, United States
$168k-$336k/yr OnsiteFull Time
10+ YOEBachelor's in EE/CS or equivalent, 10+ years SoC verification experience, expert SystemVerilog and UVM, experience developing SoC test plans, emulation exposure, and leadership in complex verification programs.
SystemVerilog, UVM, Gen-AI
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