116 soc engineer jobs at 77 companies in Rio Vista, CA
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HBM SoC Physical Design Engineer
Folsom, California, United States
$121k-$205k/yr OnsiteFull Time
3+ YOEExperience implementing SoC physical design from netlist to GDSII, STA and signoff knowledge, EDA tool proficiency, 3+ years relevant experience, and ability to mentor engineers.
Cadence Innovus, Cadence Tempus, Synopsys ICC2, Synopsys PrimeTime, Siemens Calibre, UPF, CPF, SDC
3w
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Senior SoC Design Verification Engineer
Folsom or Santa Clara
$164k-$269k/yr HybridFull Time
8+ YOE8+ years SoC verification experience, bachelor’s in EE/CE/CS, SystemVerilog/OVM/UVM expertise, debugging in pre-silicon, scripting with Python, strong communication and technical leadership.
System Verilog, OVM, UVM, Python
1mo
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Principal SoC Architect
Walnut Creek, California, United States
$168k-$300k/yr OnsiteFull Time
12+ YOEBachelor's degree in electrical or computer engineering; 12+ years in ARM-based SoC architecture and silicon development; experience with memory, IO virtualization, Ethernet, PCIe, memory subsystems, and NoC.
ARM, Ethernet, PCIe, NoC, RTL, Tcl, Perl, Python
2mo
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SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS)
Richardson or Folsom
$177k-$334k/yr OnsiteFull Time
15+ YOEExperienced SoC physical design engineer with strong EDA tool proficiency, HBM/DRAM exposure, and 15+ years of related experience.
Cadence Innovus, Tempus, Synopsys ICC2, PrimeTime, Siemens Calibre, UPF/CPF, Python, TCL, Perl, Shell
1mo
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Principal SoC Architect
Walnut Creek, California, United States
$168k-$300k/yr OnsiteFull Time
12+ YOEBachelor's in EE/CE,12+ years ARM CPU SoC/ASIC architecture experience, Ethernet/PCIe and memory subsystem expertise, EM/thermal tradeoff and IP selection experience, scripting in Tcl/Perl/Python preferred.
Tcl, Perl, Python
1mo
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Principal SoC Circuit Architect
Mountain View or Sacramento
$143k-$275k/yr HybridFull Time
8+ YOEAdvanced degree or equivalent experience in electrical/computer engineering, 8+ years SoC circuit architecture experience, expertise in high-speed IO PHY, PLL/clocking, signal and power integrity, ability to pass security and export-control screenings.
4w
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Firmware Engineer - Boot & SoC Initialization
Folsom, California, United States
$127k-$217k/yr HybridFull Time
Experience developing low-level boot/embedded firmware, C/C++ and scripting skills, familiarity with SoC boot flows and pre-silicon validation; BS/MS in EE/CE preferred.
C, C++, Verilog/SystemVerilog, UVM, Shell, Perl, Ruby, Makefile
1w
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SOC Thermal Engineer
San Francisco, California, United States
OnsiteFull Time
Optimize mobile device thermal performance, work with cross-functional teams, and participate in advanced IC packaging research and development.
2mo
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Principal, Electrical Engineer
Sunnyvale or San Francisco
$234k-$336k/yr OnsiteFull Time
20+ YOE20+ years EE and hardware validation experience; expertise in safety-critical electronics, IPC-A-610/620 manufacturing standards, SoC/MCU/FPGA schematics, DFM, ATE/HIL validation, and end-to-end high-volume product development; Bachelor's in EE required.
ATE, HIL, Design for Manufacturing (DFM), IPC-A-610, IPC-A-620, SoC, MCU, FPGA
1w
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Principal Engineer - Validation (Systems)
Roseville, California, United States
$75k-$232k/yr OnsiteFull Time
10+ YOE10+ years SoC/silicon validation experience, strong C/C++ and Python scripting, hands-on lab skills with high-speed test equipment, SoC system-level debug, and a BS/MS in Computer/Electrical Engineering or Computer Science.
C, C++, Python, Tcl, oscilloscope, protocol analyzer, logic analyzer, FPGA, VHDL, Verilog, Linux, Windows, PCIe, DDR4, DDR5, SAS, SATA, I2C, SPI, ThreadX, RTOS, MIPS
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Security Engineer
San Francisco, California, United States
OnsiteFull Time
Security engineering experience at a fast-growing startup; familiarity with SOC 2 and HIPAA compliance; security community contributions; AI product interest; strong communication and problem-solving skills.
1mo
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Senior Security Engineer
Boston or Chicago or Los Angeles or New York or San Francisco or Toronto or Vancouver or Vancouver
$145k-$175k/yr RemoteFull Time
5+ YOE5+ years security engineering experience; strong application, cloud, and infrastructure security; SOC 2 and compliance experience; vulnerability management, IaC and CI/CD security; strong communication and software engineering skills.
OWASP, NIST, CIS Controls, SOC 2, ISO 27001, AWS Security Hub, Azure Security Center, GCP Security Command Center, SIEM, SOAR, Terraform, CloudFormation, C#, CI/CD
2w
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Hardware Engineer
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$91k-$113k/yr OnsiteFull Time
Early-career candidates pursuing or recently completing an engineering degree; familiarity with hardware, firmware, ASIC/SoC, or systems; programming and design experience through coursework or projects; strong analytical and communication skills.
Verilog/SystemVerilog, RTL, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, Git, Linux, IDE, CAD, Microsoft Office, RTOS
2mo
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Hardware Engineer (Space)
Tempe or San Jose or San Francisco or New York City
$133k-$210k/yr OnsiteFull Time
6+ YOEBachelor's in Electrical Engineering,6+ years hardware engineering experience in high-speed digital board design,FPGA/SoC integration,HyperLynx and schematic tools experience,space hardware qualification experience,US citizenship,ability to travel up to 10%.
Mentor Xpedition, Cadence, HyperLynx, GitHub
3mo
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Senior Security Engineer
San Francisco, California, United States
HybridFull Time
5+ YOE5+ years in security engineering; cloud security or security operations; hands-on infrastructure security; MITRE ATT&CK, CIS benchmarks; SOC 2 TII familiarity; experience with AI tooling.
AWS, GCP, Cloud Security Tools, IAM, IaC, Checkov, Terraform, MITRE ATT&CK, CIS Benchmarks, AWS Security Hub, SIEM, SOAR
1mo
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Security Engineer
San Francisco or Palo Alto or Toronto or Los Angeles
OnsiteFull Time
Hands-on Python and AWS experience, cloud and application security, vulnerability management, IAM and secrets management, familiarity with SOC 2/ISO 27001, strong communication and threat modeling skills.
Python, AWS, Drata, Infisical, Bugcrowd, SOC 2, ISO 27001
1mo
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Senior Engineer, Security & Compliance (US)
Austin or New York City or San Francisco
$110k-$150k/yr HybridFull Time
5+ YOE5+ years security engineering experience in SaaS/cloud environments; hands-on SOC 2/ISO control implementation, cloud security (GCP/AWS/Azure), SIEM/monitoring, CI/CD automation, and AI/agent security.
GCP, AWS, Azure, SOC 2 Type II, ISO 27001, ISO 42001, SIEM, SAST, DAST, Checkov, tfsec, OPA/Rego, CI/CD
1mo
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Senior Principal Storage Architecture Engineer
Rancho Cordova, California, United States
$201k-$334k/yr HybridFull Time
10+ YOEM.S. or Ph.D. (or equivalent) in EE/CE, 10+ years in SSD/SoC/storage architecture, expertise in SoC microarchitecture, SSD firmware/hardware interactions, performance modeling, and PCIe/NVMe protocols.
SystemC, gem5, PCIe, NVMe, CXL, UCIe, ARM, RISC V
1mo
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FPGA Engineer
El Segundo or Los Angeles or Washington or San Francisco or Seattle or London
$160k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in a relevant field, 5+ years FPGA RTL design experience, Verilog/SystemVerilog, AXI protocols, Vivado and SoC FPGA experience, Bash/Python scripting, U.S. Person required.
Verilog, SystemVerilog, AXI4, AXI4-Lite, AXI4-Stream, Vivado Design Suite, Zynq, Ultrascale, Ultrascale+, Versal, TCP, UDP, IP, I2C, JTAG, UART, SPI, CAN, Bash, Python, Simulink, MATLAB, C, C++, SystemC, Chisel, VHDL, git, Bitbucket CI, Jenkins
1mo
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Senior RTL Engineer, Interconnect Design
San Francisco, California, United States
$225k-$445k/yr HybridFull Time
Senior RTL engineer with deep Verilog/SystemVerilog expertise, SoC interconnect/NoC experience, protocol knowledge (AXI, APB, CXL, PCIe, Ethernet), RTL signoff flows, and track record from microarchitecture through tape-out.
Verilog, SystemVerilog, AXI, APB, CXL, PCIe, Ethernet, RDMA, RoCE, network-on-chip, NoC, FPGA, lint, CDC/RDC, synthesis, formal verification, static timing analysis, power analysis, design-for-test
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