259 soc engineer jobs at 119 companies in Ross, CA
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SoC Platform Engineer
Saratoga, California, United States
$150k-$220k/yr OnsiteFull Time
Experience with IP integration, system verification, firmware for SoC; RTL, AMBA interconnects; C/Python scripting; ARM architecture.
SystemVerilog, VHDL, UVM, C, Python, Tcl, Bash, Makefiles, Git, VCS, Questa, Xcelium, JTAG
2mo
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SOC Intergration Engineer
Mountain View, California, United States
$120k-$600k/yr HybridFull Time
SystemVerilog; Python/Perl; experience integrating CPUs/GPUs/accelerators; SOC RTL; timing constraints; DV automation; emulation/verification familiarity.
SystemVerilog, Python, Perl, RTL design, DV tooling, Synthesis
3d
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Staff SoC RTL Engineer
Burlingame, California, United States
$175k-$230k/yr HybridFull Time
5+ YOERequires BS, MS, or Ph.D. in engineering, 5+ years of SoC/ASIC front-end design, SystemVerilog or Verilog, computer architecture, low-power design, subsystem integration, and VCS with Verilog/C co-simulation.
SystemVerilog, Verilog, VCS, Verilog/C Co-Simulation, FPGA, PCIe, UCIe, DDR, NoC
2mo
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SOC Integration Engineer
Mountain View, California, United States
$120k-$600k/yr HybridFull Time
Proficiency in SystemVerilog and scripting (Python/Perl), experience integrating SoC subsystems, defining timing/clock/reset methodologies, synthesis/linting/timing validation, and familiarity with high-speed interconnects (UCIE) and emulation; must be authorized to work in the US.
SystemVerilog, Python, Perl, UCIE
2mo
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Wireless SOC Verification Engineer
Sunnyvale, California, United States
OnsiteFull Time
Experience verifying complex wireless/Bluetooth SoCs, building reusable UVM testbenches, coverage-driven testing, and collaborating across product teams to improve tape-out readiness.
UVM
1mo
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SoC DFT Engineer, Cloud
Sunnyvale, California, United States
$163k-$237k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE/CS or equivalent; 5+ years DFT architecture/implementation/verification for SoCs; silicon bring-up and test methodology experience (ATE, MBIST, JTAG, SLT); familiarity with fault models and EDA DFT tools; Master's/PhD and 10+ years preferred.
ATE, MBIST, JTAG, System Level Test (SLT), Synopsys, Design Compiler, DFT Max, Siemens EDA, Tessent, TestKompress, IEEE 1149.1, IEEE 1687, BSDL, STIL, ATPG, iJTAG, TAP
1mo
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Senior Engineer, SoC Architecture – Memory Subsystem and Interconnect
Mountain View, California, United States
$159k-$218k/yr OnsiteFull Time
7+ YOEBSc/Masters/PhD in CS/Engineering (or equivalent), >7 years experience in fabric/system cache/DRAM controller architecture, 3+ years in SoC/ASIC design, knowledge of memory controllers, ARM bus protocols, JEDEC memory standards.
BookSim Simulator, Platform Architect, ARM, ACE, AXI, AHB, JEDEC, LPDDR, DDR, HBM
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Lead SoC Verification Engineer
Los Altos, California, United States
OnsiteFull Time
Anodize: Developing next-generation personal computing hardware and consumer electronics.
10+ YOE10+ years verifying complex ASICs; BS/MS in EE or CE; deep knowledge of AMBA interconnects; fluent in SystemVerilog/SystemC and UVM; UPF and multi-power-domain verification experience; proven silicon bring-up track record.
SystemVerilog, SystemC, UVM, AMBA CHI, AMBA AXI, AXI-S, APB, UPF
1w
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Sr. SOC Emulation Engineer, Silicon and Systems Group
Sunnyvale, California, United States
$183k-$248k/yr OnsiteFull Time
10+ YOE10+ years SOC emulation experience, bachelor's in CS/CE/EE, proficiency with emulation platforms, HDLs, C/C++, scripting (Python/Tcl/Perl), strong debugging and verification skills.
Synopsys Zebu, Cadence Palladium, Mentor Veloce, Verilog, SystemVerilog, VHDL, C++, C, Python, Tcl, Perl, AMBA AXI4, UVM
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SoC Architect
Mountain View, California, United States
$251k-$310k/yr HybridFull Time
10+ YOEMS or equivalent,10+ years ASIC/SoC digital design and microarchitecture experience, ownership of major design blocks and successful tapeouts, SystemVerilog expertise, Python/C++ fluency, strong debug and leadership skills.
SystemVerilog, Python, C++, Chisel (Scala)
3d
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ASIC/SOC DFT Engineer (Silicon Engineering)
Austin or Palo Alto
OnsiteFull Time
1+ YOEBachelor's degree in electrical engineering, computer engineering, or computer science; 1+ year ASIC experience; scan insertion or DFT setup experience; scripting and Verilog/SystemVerilog skills preferred.
csh, bash, Perl, Python, Verilog, SystemVerilog, UPF, DRC
1mo
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Lead SoC Architect - India
Sunnyvale or India
OnsiteFull Time
10+ YOERequires Bachelor's or Master's in EE/CE/CS, 10+ years SoC/ASIC experience, expertise in SoC subsystems (CPU/GPU/NPU, NoC, memory, PCIe), C/C++/SystemC modeling, RTL knowledge, and on-site presence in Sunnyvale.
C, C++, SystemC, Linux
2mo
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AI SOC Architect
Los Altos, California, United States
OnsiteFull Time
10+ YOEBachelor's in EE/CE (Master's preferred), 10+ years SoC/compute architecture experience with RISC-V and AI acceleration, expertise in multicore clusters, memory hierarchies, performance modeling, and strong communication skills.
RISC-V, AXI, UALINK, HBM, RTL
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Principal SoC Architect
Walnut Creek, California, United States
$168k-$300k/yr OnsiteFull Time
12+ YOEBachelor's in EE/CE,12+ years ARM CPU SoC/ASIC architecture experience, Ethernet/PCIe and memory subsystem expertise, EM/thermal tradeoff and IP selection experience, scripting in Tcl/Perl/Python preferred.
Tcl, Perl, Python
3w
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Principal SoC Circuit Architect
Mountain View or Sacramento
$143k-$275k/yr HybridFull Time
8+ YOEAdvanced degree or equivalent experience in electrical/computer engineering, 8+ years SoC circuit architecture experience, expertise in high-speed IO PHY, PLL/clocking, signal and power integrity, ability to pass security and export-control screenings.
3d
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Machine Learning SoC Architect
Sunnyvale or Austin or Menlo Park
$212k-$294k/yr OnsiteFull Time
12+ YOEBachelor's degree or equivalent practical experience, 12+ years defining and delivering high-performance ASICs, computer architecture expertise, ASIC modeling experience, and C++ and Python proficiency.
C++, Python, C, Pytorch, RTL
1mo
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Senior Software Engineer, Embedded Networking
Detroit or Dearborn or Pittsburgh or Palo Alto
$179k-$269k/yr OnsiteFull Time
4+ YOEBachelor's in engineering/computer science and 4+ years (or advanced degree with less experience). Strong C++ and embedded/networking experience (TCP/IP, Ethernet, CAN); SoC and time-sync knowledge; test-first mindset.
C++, TCP/IP, Ethernet, CAN, Marvell, Broadcom, IEEE802.1AS, Linux PTP, Yocto/OpenEmbedded, buildroot, Linux, GPU, PCIe, UFS, eMMC, NVMe, SoC
2mo
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Principal, Electrical Engineer
Sunnyvale or San Francisco
$234k-$336k/yr OnsiteFull Time
20+ YOE20+ years EE and hardware validation experience; expertise in safety-critical electronics, IPC-A-610/620 manufacturing standards, SoC/MCU/FPGA schematics, DFM, ATE/HIL validation, and end-to-end high-volume product development; Bachelor's in EE required.
ATE, HIL, Design for Manufacturing (DFM), IPC-A-610, IPC-A-620, SoC, MCU, FPGA
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Senior Security Engineer
Boston or Chicago or Los Angeles or New York or San Francisco or Toronto or Vancouver or Vancouver
$145k-$175k/yr RemoteFull Time
5+ YOE5+ years security engineering experience; strong application, cloud, and infrastructure security; SOC 2 and compliance experience; vulnerability management, IaC and CI/CD security; strong communication and software engineering skills.
OWASP, NIST, CIS Controls, SOC 2, ISO 27001, AWS Security Hub, Azure Security Center, GCP Security Command Center, SIEM, SOAR, Terraform, CloudFormation, C#, CI/CD
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Hardware Engineer
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$91k-$113k/yr OnsiteFull Time
Early-career candidates pursuing or recently completing an engineering degree; familiarity with hardware, firmware, ASIC/SoC, or systems; programming and design experience through coursework or projects; strong analytical and communication skills.
Verilog/SystemVerilog, RTL, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, Git, Linux, IDE, CAD, Microsoft Office, RTOS
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