189 technical design jobs at 98 companies in Manteca, CA

3w
Save
Mark Applied
Hide
Physical Design Technical Leader
San Jose, California, United States
$179k-$286k/yr OnsiteFull Time
MediaTek
MediaTekTaiwan Stock Exchange: 2454: Designs and develops system-on-chip solutions for electronic devices.
10+ YOE10+ years physical design and flow development experience; advanced-node (4nm/3nm/2nm) and low-power design expertise; familiarity with DRC/LVS, timing closure, IR/EM, floorplanning; CoWoS/EMIB/3DIC experience a plus.
EDA, RTL, GDSII, CoWoS-S, CoWoS-L, EMIB, 3DIC
2mo
Save
Mark Applied
Hide
IC Package Design Technical Leader
San Jose, California, United States
$211k-$305k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
12+ YOEBachelor or Master in Electrical Engineering with 8-12+ years of experience; strong background in high-speed package design, SI/PI, PDN; experience with EDA tools; technical leadership.
EDA tools
1w
Save
Mark Applied
Hide
Senior Technical Product Designer - Design Platform (San Jose)
San Jose, California, United States
$108k-$220k/yr OnsiteFull Time
TikTok
TikTok: Global short-form video hosting and social media platform.
5+ YOEBachelor's in CS/HCI or equivalent,5+ years product/UX and front-end development experience,proficiency in Figma,JavaScript/TypeScript,React,portfolio demonstrating user-centered design.
Figma, Trae, Cursor, JavaScript, TypeScript, React, MUI, shadcn, Next.js, Tailwind
1w
Save
Mark Applied
Hide
Physical Design Technical Lead
San Jose, California, United States
$210k-$299k/yr OnsiteFull Time
Altera
Altera: Manufacturer of field-programmable gate arrays and programmable logic devices.
15+ YOE4+ MgmtMaster's in EE/CE plus 15+ years physical design experience, 4+ years technical lead experience, hands-on tapeout ownership, expertise with Synopsys/Cadence toolchains, STA, power/EMIR, UPF/CPF, Tcl/Python scripting, and ML/AI-driven physical-design workflows.
Synopsys Fusion Compiler, Cadence Innovus, Synopsys PrimeTime, Ansys RedHawk, Cadence Voltus, Mentor Calibre, Cadence PVS, Synopsys DSO.ai, Fusion Compiler AI, Cadence Cerebrus, Tcl, Python, Perl
1mo
Save
Mark Applied
Hide
Design Verification Technical Architect
Austin or San Jose or Santa Clara
$150k-$190k/yr OnsiteFull Time
Quest Global
Quest Global: Global engineering services for product development and lifecycle management.
10+ YOE10+ years DV experience; SV-UVM; Python; Verilog; C; high speed protocol (PCIe, UCIe, LPDDR5, Ethernet200G); SS/SOC level verification; source control (git); emulation; Arm core; C-base; test plan development.
SV-UVM, Python, Verilog, C, PCIe, UCIe, LPDDR5, Ethernet200G+, SystemVerilog, RISCV, AMBA, git, Emulation, Arm Core, C-Base
3w
Save
Mark Applied
Hide
Interiors Technical Coordinator (Healthcare Expereince)
San Francisco or San Jose
$105k-$125k/yr HybridFull Time
HOK
HOK: Global architecture, engineering, and planning design firm.
Bachelor's in architecture or interior design required; LEED credential within 12 months; preferred 10+ years experience; strong technical documentation, coordination, and supervision skills.
Building Information Model (BIM)
1mo
Save
Mark Applied
Hide
Senior Technical Content Designer (API)
Irvine or Los Angeles or New York City or San Francisco or San Jose or Ventura
$152k-$189k/yr OnsiteFull Time
The Trade Desk
The Trade DeskNASDAQ: TTD: Cloud-based programmatic advertising platform for data-driven media buying.
7+ YOE7+ years technical writing/content design; documenting SDKs, REST and GraphQL APIs; docs-as-code with Git/GitHub/GitLab; proficiency in Markdown, HTML, XML, CSS, YAML; experience with Visual Studio Code, Jira, Confluence, Slack, Postman; content architecture skills.
Markdown, HTML, XML, CSS, YAML, Git, GitHub, GitLab, Visual Studio Code, Jira, Confluence, Slack, Postman, OpenAPI Specification, REST, GraphQL
3mo
Save
Mark Applied
Hide
Senior Technical Staff-Design (Signal and Power Integrity)
San Jose, California, United States
$91k-$232k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
15+ YOEBS in Electrical Engineering; 15+ years SIPI; PCB design; high-speed SerDes; PDN optimization; SI/PI analysis;熟悉 industry tools.
HFSS, Siwave, HyperLynx, HSPICE, Redhawk, Keysight ADS, Vector Network Analyzers, Time Domain Reflectometers, Oscilloscopes, BERTs, TDRs, IBIS-AMI modeling
3w
Save
Mark Applied
Hide
Technical Designer - Junior
San Jose, California, United States
$75k-$82k/yr OnsiteFull Time
Gensler
Gensler: Global architecture, design, and planning firm shaping the built environment.
0+ YOEBachelor’s in Architecture (or equivalent); 0–5 years related experience; proficiency with Rhino, Grasshopper, Revit, Enscape; expert Adobe Illustrator/Photoshop/InDesign; knowledge of materials, codes; progress on AXP/ARE a plus.
Rhino, Grasshopper, Revit, Enscape, Adobe Illustrator, Adobe Photoshop, Adobe InDesign
1mo
Save
Mark Applied
Hide
Technical Lead Design Verification Engineer
San Jose, California, United States
$147k-$195k/yr OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Designs connectivity solutions for cloud and AI infrastructure.
5+ YOEBachelor’s in Electrical Engineering; 5+ years in verifying complex SoCs for server/storage/networking; strong problem-solving; US work-authorized; able to work with minimal supervision.
SystemVerilog, UVM, C, C++, Python
2w
Save
Mark Applied
Hide
Technical Director - Digital IC Design
San Jose or Hillsboro
$170k-$340k/yr OnsiteFull Time
Skyworks Solutions
Skyworks SolutionsNASDAQ: SWKS: Designs and manufactures analog and mixed-signal semiconductor solutions.
12+ YOEBachelor's in EE/CE required (Master's/PhD preferred), 12+ years in digital IC design with hardware DSP focus, proven ASIC/SoC delivery, team leadership, RTL (Verilog/SystemVerilog/SystemC), synthesis/timing/simulation, FPGA prototyping, low-power and physical design expertise.
Verilog, SystemVerilog, SystemC, JasperGold
3w
Save
Mark Applied
Hide
Technical Staff Engineer - Digital Design
San Jose, California, United States
$70k-$143k/yr HybridFull Time
Microchip Technology
Microchip TechnologyNASDAQ: MCHP: Designs and manufactures microcontrollers and mixed-signal semiconductor solutions.
12+ YOEBachelor's in EE/CE, 12+ years relevant experience (10+ in FPGA/ASIC IP and system design), VHDL/Verilog expertise, FPGA design/verification experience, strong digital design and architecture knowledge, excellent communication; US citizenship or permanent residency required.
VHDL, Verilog, Libero, Quartus, Vivado, Identify Debugger, SignalTap, ChipScope, ModelSim, QuestaSim, Python, TCL
5h
Save
Mark Applied
Hide
Senior Technical Architect/Specifier
Walnut Creek, California, United States
$98k-$136k/yr OnsiteFull Time
ECS Limited
ECS Limited: Provides geotechnical, environmental, and facilities engineering consulting services.
8+ YOE8+ years specification writing experience, 6+ years in architectural/commercial interiors, AIA MasterFormat expertise, proficiency with Bluebeam/AutoCAD/Revit/Deltek MasterSpec, strong design aptitude and communication.
Microsoft Office, Microsoft Word, Bluebeam Revu, Bluebeam Studio, Adobe Acrobat, VisiSpecs, AutoCAD, Revit, Deltek MasterSpec
4w
Save
Mark Applied
Hide
Principal, Design
San Jose, California, United States
$225k-$300k/yr HybridFull Time
eBay
eBayNASDAQ: EBAY: Global online marketplace for buying and selling diverse products.
15+ YOE15+ years experience in product/UX design, leading large-scale initiatives, strong stakeholder influence, hands-on UX and interaction craft, understanding of technical constraints, and ability to operate in hybrid/global teams.
2mo
Save
Mark Applied
Hide
Technical Support Scientist, Probe Design
Newark, California, United States
$89k-$147k/yr OnsiteFull Time
Bio-Techne
Bio-TechneNASDAQ: TECH: Provides reagents, instruments, and diagnostic tools for life sciences.
5+ YOEPhD or MS with 3+ years in molecular biology or bioinformatics; 5+ years Linux, Python, Perl; sequencing; probe design; strong communication and troubleshooting skills.
Linux, Python, Perl, BLAST, BLAT, RNAscope, BaseScope, miRNAscope
1w
Save
Mark Applied
Hide
Principal Design Engineer
San Jose, California, United States
$176k-$298k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
8+ YOE8+ years IC design experience, hands-on AI/LLM tool use, expertise in high-speed IO and physical/layout flows, ability to redesign workflows for AI, strong mentorship and technical leadership.
LLM-based assistants, RTL, BSIM, DDR4, DDR5, LPDDR5, LPDDR6, HBM3, HBM3E, HBM4, retrieval-augmented generation (RAG), EDA
4w
Save
Mark Applied
Hide
Electrical Design Engineeer
Milpitas, California, United States
$118k-$200k/yr OnsiteFull Time
KLA
KLANASDAQ: KLAC: Provides process control and yield management for semiconductor manufacturing.
3+ YOETechnical degree in electrical engineering or related field, 3+ years industry experience, PCB and circuit design, lab testing and troubleshooting, FPGA/firmware and C/C++ preferred, familiarity with PCB tools and SEMI standards.
OrCAD, Allegro, Altium, PSpice, ModelSim, Xilinx/Altera FPGA toolchains, C/C++, Visio, AutoCAD, Microsoft 365, oscilloscopes, DMMs, spectrum/network analyzers, power meters
1mo
Save
Mark Applied
Hide
Senior Hardware Design Engineer
San Jose, California, United States
$180k-$200k/yr OnsiteFull Time
Fairchild Imaging
Fairchild Imaging: Designs and manufactures high-performance CMOS and X-ray image sensors.
8+ YOEBS/MS in EE, 8+ years hardware design experience with high-speed digital PCBs, CMOS image sensor integration, signal/power integrity expertise, technical leadership/mentoring, and experience with Altium Designer or Cadence Allegro and lab debugging instruments.
Altium Designer, Cadence Allegro, oscilloscope, protocol analyzer, logic analyzer, SLVS, SLVS-EC, MIPI CSI-2, USB-C, LVDS
3w
Save
Mark Applied
Hide
Technical Director, Hardware Design - Optical Transceiver - Fremont, California, United States
Fremont, California, United States
$180k-$300k/yr OnsiteFull Time
Koch Inc.
Koch Inc.: Operates global manufacturing, refining, and industrial technology businesses.
10+ YOEBachelor's in EE/Physics, 10+ years hardware design experience, 5+ years on coherent/PAM4 optical transceivers, proficiency with lab instruments (OSA, BERT, OMA, power meters), automation using C# or Python, familiarity with IEEE/OIF standards, leadership and communication skills.
OSA, BERT, OMA, power meters, C#, Python
3w
Save
Mark Applied
Hide
Technical Sales Consultant
Union City, California, United States
$100k-$120k/yr OnsiteFull Time
Veritiv
Veritiv: Distributes packaging, facility, and print products and solutions.
5+ YOE5+ years related experience, technical sales and demonstrations, RFP/RFI support, solution design, meet sales targets; bachelor's degree preferred; strong communication and problem-solving skills.