156 verification engineer jobs at 58 companies in Gardner, MA
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Senior Verification Engineer
Wilmington, Massachusetts, United States
$110k-$152k/yr OnsiteFull Time
4+ YOE4+ years verification experience with SystemVerilog/UVM, RTL simulation and debug, scripting (Python/Perl/Tcl), SoC/processor verification, and strong analytical/debugging skills.
SystemVerilog, UVM, VCS, Xcelium, Simvision, Verdi, Questa, Python, Perl, Tcl, Linux, ARM Cortex-M, RISC-V, APB, AHB, AXI, QSPI, UART, DMA
1w
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FPGA Verification Engineer
Waltham, Massachusetts, United States
$166k-$220k/yr OnsiteFull Time
8+ YOEBachelor's in electrical engineering, computer engineering, or related technical field; 8+ years developing FPGA HDL firmware; VHDL/Verilog, SystemVerilog, verification testbenches, Git or Subversion, and Secret clearance eligibility.
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, Unix, Linux, C, C++, Python, Perl, QuestaSim, Synplify, Quartus, Vivado
3mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
3d
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Hardware Verification Engineer
North Reading, Massachusetts, United States
$82k-$131k/yr OnsiteFull Time
2+ YOEBachelor's degree in electrical or computer engineering and 2–5 years of relevant experience. Requires C/C++/C#, .NET, test equipment, circuit theory, signal tracing, teamwork, and analytical skills.
C, C++, C#, .NET framework, oscilloscopes, DMMs, waveform generators, PC, Z540.1, ISO 17025
1w
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Senior ASIC Verification Engineer - HSIO
Westford or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or master's degree or equivalent experience, 5+ years relevant experience, and expertise in SystemVerilog, UVM, IP/interconnect protocol verification, coverage, assertions, debugging, and collaboration.
SystemVerilog, UVM, Perl, Python, AI-enabled code assist, root-cause analysis tools
1w
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Senior ASIC Verification Engineer - HSIO
Westford or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or master's degree or equivalent experience, 5+ years relevant experience, SystemVerilog and UVM expertise, IP or interconnect protocol verification, debugging, analysis, problem solving, and collaboration skills.
SystemVerilog, UVM, Perl, Python
2mo
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Senior Principal Engineer, Design Verification
Westborough, Massachusetts, United States
$205k-$303k/yr OnsiteFull Time
10+ YOEDegree in electrical/computer engineering, 10+ years verification experience (block-to-chip), strong System Verilog/UVM, Python or Perl, EDA tools, testplan/coverage development, technical leadership and debugging skills.
System Verilog, UVM, Python, Perl, EDA verification tools
3mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE or related,5+ years hardware verification experience with SystemVerilog/UVM,experience with industry EDA tools,US citizenship and active Secret clearance required,ability to travel up to 10%.
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, AMD/Xilinx Vivado, Altera Quartus, Microchip Libero, TCL, Perl, Python, Linux
2mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
2w
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Design Verification Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
Responsible for verifying the functionality and performance of Apple's system-on-chip products; the posting does not specify education, certifications, or experience requirements.
1mo
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Verification & Validation Test Engineer
Manchester, New Hampshire, United States
OnsiteFull Time
3+ YOEBS in engineering, 3+ years testing electro-mechanical devices, lab and fluid-handling skills, mentorship experience, strong written/verbal communication, and problem-solving skills.
2w
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SOC Design Verification Lead
Boxborough, Massachusetts, United States
$175k-$300k/yr HybridFull Time
5+ YOESeasoned SoC design verification and infrastructure architect with testbench architecture, verification methodology, project execution, and SoC architecture expertise; UVM, C++, SystemVerilog, GitHub Copilot, and Cursor experience preferred.
UVM, C++, SystemVerilog, GitHub Copilot, Cursor
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
1w
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of regulated medical-device software verification experience, IEC 62304 and FDA design-control knowledge, strong communication, and onsite hardware-testing availability.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC
1w
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of software verification experience in medical devices or regulated industries, IEC 62304 and FDA design control knowledge, and strong communication skills. Python and mobile or embedded testing experience preferred.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC, IEC 62304, ISO 13485, FDA
3mo
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Principal Firmware Verification Engineer - UVM (Onsite)
Marlborough, Massachusetts, United States
$108k-$205k/yr OnsiteFull Time
8+ YOEDegree in STEM with 8+ years experience or advanced degree with 5+ years; 4+ years UVM; SystemVerilog and VHDL; experience with FPGA/SoC/CPLD verification; familiar with AXI/ SPI/ I2C/ PCIe/ UART/ Gb Ethernet; scripting in TCL/Perl/Python; Git/SVN; cross-functional Agile.
UVM, SystemVerilog, VHDL, AXI, SPI, I2C, PCIe, UART, Gb Ethernet, TCL, Perl, Python, Git, SVN
3mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
3mo
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Design Verification Test (DVT) Manager
Derry, New Hampshire, United States
$125k-$140k/yr OnsiteFull Time
5+ YOE3+ MgmtBachelor's in engineering; 5 years product validation/certification; 3+ years management in test/verification; knowledge of safety design/test; experience with certifications (UL) and ISO; create test processes/reports; support factory releases.
2mo
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Senior Staff Engineer Pre-Silicon Verification AMS
Andover or Warwick
$118k-$162k/yr HybridFull Time
3+ YOEBSEE/ME or equivalent with 3+ years' experience. Experience with VerilogAMS/SystemVerilog, Cadence Virtuoso, Xcelium/ADE Explorer, Spectre; mixed-signal simulation, AMS modeling, scripting (Python, C/C++), Unix/Linux, and strong debugging and collaboration skills.
VerilogAMS, SystemVerilog, Cadence Virtuoso, Xcelium, ADE Explorer, Spectre, Verilog, Python, C, C++, Microsoft Word, Microsoft PowerPoint, Microsoft Excel, Unix/Linux
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