46 verification engineer jobs at 13 companies in Longview, WA
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Principal Verification Engineer
Mountain View or Redmond or Hillsboro or Austin or Raleigh
$143k-$275k/yr HybridFull Time
3+ YOERequires a degree in electrical engineering, computer engineering, computer science, or related field and 3–8+ years of technical engineering experience depending on degree; verification, UVM, RTL, simulation, scripting, and security screening required.
Universal Verification Methodology (UVM), C, Zsh, Bash, Python, Perl, Verilog, Microsoft Azure, AXI, AMBA
3mo
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Physical Verification Engineer
Phoenix or Santa Clara or Hillsboro
$129k-$245k/yr HybridFull Time
3+ YOEUS citizenship, ability to obtain US government security clearance, Bachelor in Electrical/Computer Engineering or STEM, 3+ years in CMOS processes and layout verification, 3+ years in parasitic extraction and scripting
Python, Perl, Tcl, Shell, StarRC, Quantus, xACT, ICV, Calibre, Pegasus, LVS, DRC, ERC, PERC, Parasitic Extraction Tools
1mo
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Digital Verification Engineer Lead (MTD, Tualatin, OR)
Tualatin, Oregon, United States
$155k-$248k/yr OnsiteFull Time
10+ YOE10+ years verification experience with System Verilog/UVM, verification planning, testbench architecture, scripting, source control, and leading cross-site verification teams.
System Verilog, UVM, Makefiles, shell, TCL, Perl, Python, clearcase, git, svn, GVP, Ethernet, PCIe, AXI, MIPI, DRAM, FLASH
3mo
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Senior Engineer Design Verification Engineering
Beaverton, Oregon, United States
$119k-$163k/yr HybridFull Time
2+ YOEMaster's in CS/CE/EE or related field with 2 years in design verification; or Bachelor's with 4 years, plus strong scripting and verification experience.
SystemVerilog, UVM, Cadence Xcelium, Synopsys VCS, Perl, Python, scripting
2mo
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SoC Physical Design Verification Engineer
Beaverton, Oregon, United States
OnsiteFull Time
Experience with physical verification of system-on-chip (SoC) designs and contributing to the design and manufacture of high-performance, power-efficient processors.
1mo
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Senior Memory Controller Verification Engineer
Santa Clara or Austin or Westford or Hillsboro or Seattle
$168k-$311k/yr HybridFull Time
6+ YOE6+ years ASIC verification experience, SystemVerilog/UVM, simulation and debug tool experience (VCS, Debussy, GDB), strong C/C++ and scripting (Python/Perl/shell), BS/MS or equivalent.
VCS, Debussy, GDB, System Verilog, UVM, C, C++, Python, Perl, shell
1mo
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Senior Memory Controller Verification Engineer
Santa Clara or Westford or Austin or Hillsboro or Seattle
$168k-$311k/yr HybridFull Time
6+ YOE6+ years ASIC verification experience, BS/MS or equivalent, SystemVerilog/UVM experience, familiarity with VCS/Debussy/GDB, C/C++ and scripting (Python/Perl/shell), strong debugging and teamwork skills.
VCS, Debussy, GDB, System Verilog, UVM, C, C++, Python, Perl, Shell
1mo
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Integrated Circuit Design Verification Engineer
Vancouver, Washington, United States
$173k-$259k/yr OnsiteFull Time
10+ YOE10+ years ASIC design verification experience; strong UVM/SystemVerilog skills; Siemens Questa; develop UVM/assertion testbenches, functional and code coverage, scripting/automation in Linux.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
2w
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Design Verifciation Principal Engineer
Hillsboro, Oregon, United States
$127k-$237k/yr HybridFull Time
10+ YOEBachelor's in EE/CS, 10+ years in design verification, SystemVerilog/Verilog RTL fluency, HDL testbench experience, DDR familiarity preferred; Python and TCL scripting experience preferred.
System Verilog, Verilog, Python, TCL
3w
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Assistant City Traffic Engineer
Beaverton, Oregon, United States
$10k-$13k/mo OnsiteFull Time
8+ YOE3+ MgmtBachelor's in civil engineering, eight years professional traffic engineering experience including three years supervisory experience; PE in Oregon (or obtain within 6 months); valid driver’s license; pass background and education verification.
2w
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Analog ASIC Design Engineer
Boulder or Louisville or Beaverton
HybridFull Time
5+ YOEBSEE or MSEE in EE, 5+ years analog/mixed‑signal IC design experience, ASIC design and verification tool proficiency, RF and layout experience, lab characterization, strong communication and collaboration skills.
Ansys HFSS, Cadence EMX
1mo
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Propulsion Engineering Lead
Beaverton, Oregon, United States
$170k-$200k/yr OnsiteFull Time
8+ YOE8+ years spacecraft propulsion experience, BS/MS in Aerospace or Mechanical Engineering, electric propulsion (Hall or gridded ion), xenon feed and PPU integration, propulsion verification and testing, supplier selection, COPV/safety knowledge; U.S. person required.
1w
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Supply Chain and Engineering– Software Defined Vehicle (SDV) Go-To-Market, Senior Manager / Associate Director
Albany or Arlington or Atlanta or Austin or Beaverton or Bentonville or Boston or Carmel or Charlotte or Chicago or Cincinnati or Cleveland or Columbus or Culver City or Denver or Des Moines or Detroit or Hartford or Houston or Irving or Kirkland or Miami or Milwaukee or Minneapolis or Morristown or Mountain View or Nashville or New York City or Oklahoma City or Overland Park or Philadelphia or Pittsburgh or Raleigh or Redmond or Sacramento or San Diego or San Francisco or Scottsdale or Seattle or St. Louis or St. Petersburg or Walnut Creek or United States
$113k-$271k/yr HybridFull Time
12+ YOE8+ MgmtRequires 12+ years in consulting, engineering, or complex product roles; 8+ years in solution shaping and delivery leadership; SDV expertise; 5+ years with OEMs, suppliers, or mobility firms; bachelor's degree.
DevOps, cloud, data, AI, embedded software, vehicle software platforms, E/E architectures, OTA, ALM, PLM, DevSecOps, validation, verification, systems integration
3w
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Project Manager
Austin or Hillsboro or Boise
$115k-$140k/yr HybridFull Time
Project manager for design-build advanced technology projects; bachelor's in engineering preferred; PMP desired; experience with Deltek Vantagepoint, Microsoft Project or Primavera P6; ability to perform field verifications and lead cross-cultural teams.
Deltek Vantagepoint, Microsoft Project, Primavera P6, vibe-coding platforms, AI Large Language Models
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