61 verification engineer jobs at 43 companies in Rye Brook, NY
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Senior Verification & Integration Engineer
New York, New York, United States
$125k-$165k/yr OnsiteFull Time
3+ YOEBS in EE/Physics, 3+ years system or sensor test/verification experience, hands-on lab equipment use, Python for automation, strong systems thinking and communication, ability to work onsite.
oscilloscopes, power supplies, function generators, spectrum analyzers, logic analyzers, Python, C/C++
2mo
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Senior Design Verification Engineer
Tempe or Independence or Arizona or Ohio or San Jose or New York City
$142k-$224k/yr HybridFull Time
8+ YOE8+ years design verification experience with UVM and testbench development; Bachelor's in EE/CE or related; experience with Questa/Xcelium/VCS; AI/agentic DV experience preferred; US citizenship and ability to obtain Secret clearance; travel up to 10%.
UVM, SystemVerilog, VHDL, Verilog, Questa, Xcelium, VCS, Jira
1mo
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Integrated Circuit Design Verification Engineer
Vancouver or Washington or California or New York City
$147k-$259k/yr OnsiteFull Time
10+ YOE10+ years of ASIC design verification experience, BSEE or MSEE (or equivalent), strong UVM/SystemVerilog skills, Siemens Questa experience, scripting (TCL/Make/Perl/Python/Shell), and excellent communication.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
20h
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Embedded Software Verification Engineer
Pine Brook, New Jersey, United States
$80k-$95k/yr OnsiteFull Time
Bachelor's degree in a relevant technical discipline, software development or verification experience, Python and/or C/C++ programming, debugging, analytical and technical writing skills; U.S. citizenship required.
Python, C, C++, DO-178C, Hardware-in-the-Loop (HIL), Software-in-the-Loop (SIL), CAN, UART, SPI, I2C, Ethernet, DOORS, Git, Subversion, Jira, MATLAB, Simulink, SCADE, MC/DC
2mo
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Design Verification Engineering Lead - Silicon One
San Jose or New York City or New York or Washington or Illinois or United States or Canada
$211k-$305k/yr OnsiteFull Time
5+ YOEDegree plus extensive ASIC DV experience (Bachelors+12/Masters+8/PhD+5), recent Verilog/SystemVerilog/UVM experience, scripting (Perl or Python), ASIC verification, emulation and bring-up experience.
Verilog, SystemVerilog, UVM, Perl, Python, Linux, C, C++, Veloce, Palladium, Zebu, HAPS, Jasper Gold, Cursor, Codex, CoPilot, P4
1w
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2027 Masters Hardware Design Verification Engineering Intern/Co-op
Austin or Boxborough or Fort Collins or Longmont or Fishkill or Rochester or Secaucus
$80k-$120k/yr HybridInternship, Temporary
Currently enrolled in a U.S. bachelor's program in electrical or computer engineering or related field; knowledge of programming, hardware verification, digital systems, and lab equipment preferred.
C++, Python, C, Perl, Shell, UVM, Verilog, SystemVerilog, MySQL, PHP, Linux, Unix, Windows, FSM, HDL, Oscilloscopes, Voltmeters, Logic analyzers, Multimeters
3mo
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Product Line Integratioin Verification & Validation Lead Engineer
Nashua or Totowa or New Hampshire or New Jersey or United States
$150k-$254k/yr OnsiteFull Time
8+ YOE3+ MgmtBachelor's in a technical field, 8+ years systems testing/IV&V experience, 3+ years leadership, experience with EW/RADAR/communications preferred, ability to obtain Top Secret clearance (active Secret or higher preferred).
MBSE (Model-Based Systems Engineering), Agile
3mo
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Energy Engineer: Measurement and Verification
Piscataway or New York
$70k-$82k/yr HybridFull Time
1+ YOEBachelor's in Engineering; 1-3 years in M&V/energy analytics; IPMVP/ASHRAE/FEMP knowledge; Excel required; Python/R/SQL preferred; travel within the US.
Excel, Python, R, SQL, Data analysis, BAS
2mo
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Senior Software Engineer, Formal Verification
New York City or United States
$180k-$250k/yr RemoteFull Time
5+ YOE5+ years C++ systems engineering experience, hands-on interactive theorem prover experience (ideally Rocq/Coq), strong concurrency and memory reasoning, degree in CS or equivalent experience, clear communication and performance profiling skills.
Rocq, Iris, BRiCk, C++, GitHub, EVM
3w
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Professional Ⅱ, Software Verification
Berkeley Heights, New Jersey, United States
$178k-$188k/yr OnsiteFull Time
3+ YOEMaster's degree in engineering, telecommunications, computer science, or related field plus 3 years' experience with wireless validation, protocol analysis, automation, Python, Android, chipsets, and 5G/4G/IMS technologies.
QXDM, QPST, XCAL, Wireshark, Python, Android, 5G NR, LTE, IMS, SIP, VoLTE, WFC, VT, 3GPP, GSMA
1w
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Senior Mechanical Engineer
Boydton or United States or Virginia or San Francisco or New York City
$120k-$235k/yr OnsiteFull Time
7+ YOERequires 7+ years of related engineering experience, or an applicable mechanical engineering degree with qualifying experience. Security screening and citizenship verification are required.
Microsoft Azure, Bing, Office 365, Xbox, OneDrive, Material Change Review Board (MCRB)
2w
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System Engineer
Lisle or Florham Park or Westminster
$108k-$228k/yr HybridFull Time
7+ YOERequires 7+ years of systems engineering, 5+ years of electronic warfare experience, requirements development, architecture, verification and validation, a technical bachelor's degree, and U.S. citizenship.
Agile, DevSecOps, CI/CD, CMOSS, SOSA, FACE
1d
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Principal Systems Engineer
North Haven, Connecticut, United States
$134k-$202k/yr OnsiteFull Time
7+ YOEBachelor's degree with 7+ years, master's with 5+ years, or PhD with 3+ years of engineering experience; regulated product systems engineering, design controls, risk management, verification, and validation experience required.
1d
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Principal Systems Engineer
North Haven, Connecticut, United States
$134k-$202k/yr OnsiteFull Time
7+ YOEBachelor's degree with 7+ years, master's with 5+ years, or PhD with 3+ years of engineering experience; regulated product systems engineering, requirements, risk, verification, validation, design controls, and technical leadership.
SKUs
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Principal Engineer - Design
Hauppauge, New York, United States
$75k-$232k/yr OnsiteFull Time
10+ YOEBachelor's in Electrical Engineering or equivalent,10+ years relevant experience,Verilog/System Verilog proficiency,experience with Ethernet/USB/PCIe and ASIC design/verification,strong problem solving and communication skills.
Verilog, System Verilog, Xilinx FPGA
2w
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Senior Thermal Engineer
Rockleigh, New Jersey, United States
HybridFull Time
Bachelor's degree in mechanical engineering, thermal modeling and CFD simulation experience, CAD proficiency, heat transfer knowledge, and hands-on airflow and thermal verification testing experience.
Creo, SolidWorks, Computational Fluid Dynamics (CFD), CAD
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Digital Engineer V
Huntsville or Exeter or Plainview or Hauppauge or Colorado Springs or Colorado
$150k-$200k/yr OnsiteFull Time
10+ YOEBachelor's in Electrical or Computer Engineering, minimum 10 years experience in digital hardware design, expertise in FPGA and high-speed interfaces, signal/power integrity, schematic capture, and hardware verification.
Siemens DXDesigner, Altium Designer, Hyperlynx SI/PI
3w
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Hardware Engineer III
Gurgaon or New York City
HybridFull Time
3+ YOEBachelor's degree in electrical engineering or equivalent experience; 3–5 years in ASIC/FPGA development and verification; expertise in Verilog, SystemVerilog/VHDL, Xilinx tools, networking, Linux, Python, and C/C++.
Verilog, SystemVerilog, VHDL, Xilinx, cocotb, UVM, Linux, Shell scripting, Python, C, C++, FPGA, ASIC, Ethernet, PCIe
3w
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ASIC Engineer
New York City, New York, United States
$250k-$300k/yr OnsiteFull Time
4+ YOE4+ years RTL design and verification experience; ASIC design using Synopsys or Cadence flows; experience in front-end, back-end or verification; FPGA/ASIC familiarity; programming experience (Python, C++, Java, Haskell); willingness to learn OCaml.
Hardcaml, OCaml, Synopsys, Cadence, Python, C++, Java, Haskell
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