203 verification engineer jobs at 73 companies in Westminster, MA
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Verification Engineer/Lead
North America or San Francisco or Austin or Boston
HybridFull Time
Experience owning block or subsystem verification in SoCs, driving verification for complex processors or high-performance ASICs, and performing performance verification; chip, chiplet, network, and multi-die verification preferred.
1mo
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Senior Verification Engineer
Wilmington, Massachusetts, United States
$110k-$152k/yr OnsiteFull Time
4+ YOE4+ years verification experience with SystemVerilog/UVM, RTL simulation and debug, scripting (Python/Perl/Tcl), SoC/processor verification, and strong analytical/debugging skills.
SystemVerilog, UVM, VCS, Xcelium, Simvision, Verdi, Questa, Python, Perl, Tcl, Linux, ARM Cortex-M, RISC-V, APB, AHB, AXI, QSPI, UART, DMA
2w
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Formal Verification Engineer
Austin or Boston or Santa Clara
$127k-$217k/yr HybridFull Time
8+ YOERequires 8+ years in design verification focused on formal verification, VC Formal or JasperGold, SystemVerilog Assertions, TCL/Python/Perl, and a bachelor's or master's degree in computer or electrical engineering.
VC Formal, JasperGold, SystemVerilog Assertions (SVA), TCL, Python, Perl
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FPGA Verification Engineer
Waltham, Massachusetts, United States
$166k-$220k/yr OnsiteFull Time
8+ YOEBachelor's in electrical engineering, computer engineering, or related technical field; 8+ years developing FPGA HDL firmware; VHDL/Verilog, SystemVerilog, verification testbenches, Git or Subversion, and Secret clearance eligibility.
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, Unix, Linux, C, C++, Python, Perl, QuestaSim, Synplify, Quartus, Vivado
1w
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Verification Engineer - New College Grad 2026
Santa Clara or Austin or Westford
$100k-$190k/yr OnsiteFull Time
Bachelor's or master's in electrical or computer engineering or related field; experience with testbenches, verification methodologies, C++, scripting, SystemVerilog, simulation and debugging tools.
C++, SystemVerilog, VCS, Debussy, GDB
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
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Hardware Verification Engineer
North Reading, Massachusetts, United States
$82k-$131k/yr OnsiteFull Time
2+ YOEBachelor's degree in electrical or computer engineering and 2–5 years of relevant experience. Requires C/C++/C#, .NET, test equipment, circuit theory, signal tracing, teamwork, and analytical skills.
C, C++, C#, .NET framework, oscilloscopes, DMMs, waveform generators, PC, Z540.1, ISO 17025
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Senior ASIC Verification Engineer - HSIO
Westford or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or master's degree or equivalent experience, 5+ years relevant experience, and expertise in SystemVerilog, UVM, IP/interconnect protocol verification, coverage, assertions, debugging, and collaboration.
SystemVerilog, UVM, Perl, Python, AI-enabled code assist, root-cause analysis tools
1w
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Senior ASIC Verification Engineer - HSIO
Westford or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or master's degree or equivalent experience, 5+ years relevant experience, SystemVerilog and UVM expertise, IP or interconnect protocol verification, debugging, analysis, problem solving, and collaboration skills.
SystemVerilog, UVM, Perl, Python
2mo
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Senior Principal Engineer, Design Verification
Westborough, Massachusetts, United States
$205k-$303k/yr OnsiteFull Time
10+ YOEDegree in electrical/computer engineering, 10+ years verification experience (block-to-chip), strong System Verilog/UVM, Python or Perl, EDA tools, testplan/coverage development, technical leadership and debugging skills.
System Verilog, UVM, Python, Perl, EDA verification tools
3mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE or related,5+ years hardware verification experience with SystemVerilog/UVM,experience with industry EDA tools,US citizenship and active Secret clearance required,ability to travel up to 10%.
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, AMD/Xilinx Vivado, Altera Quartus, Microchip Libero, TCL, Perl, Python, Linux
2mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
2w
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Design Verification Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
Responsible for verifying the functionality and performance of Apple's system-on-chip products; the posting does not specify education, certifications, or experience requirements.
3mo
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Staff Design Verification Engineer – Coherent Interconnect
Boston or Austin
OnsiteFull Time
7+ YOELead verification for cache-coherent interconnect; 7+ years ASIC/SoC verification; SystemVerilog/UVM expertise; strong debugging and collaboration skills.
SystemVerilog, UVM, Verilog, Python
1mo
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Hardware Verification Engineer — Electro-Optic Links
Boston or Mountain View
$195k-$250k/yr HybridFull Time
8+ YOE8+ years experience leading verification of high-speed electro-optic/serial links; hands-on lab characterization; expertise with SerDes, signal integrity, and automation using Python/MATLAB.
Python, MATLAB, VNA, BERTs, TDRs, ADS, HFSS, Cadence, COMSOL
1w
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of regulated medical-device software verification experience, IEC 62304 and FDA design-control knowledge, strong communication, and onsite hardware-testing availability.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of software verification experience in medical devices or regulated industries, IEC 62304 and FDA design control knowledge, and strong communication skills. Python and mobile or embedded testing experience preferred.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC, IEC 62304, ISO 13485, FDA
3mo
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Principal Firmware Verification Engineer - UVM (Onsite)
Marlborough, Massachusetts, United States
$108k-$205k/yr OnsiteFull Time
8+ YOEDegree in STEM with 8+ years experience or advanced degree with 5+ years; 4+ years UVM; SystemVerilog and VHDL; experience with FPGA/SoC/CPLD verification; familiar with AXI/ SPI/ I2C/ PCIe/ UART/ Gb Ethernet; scripting in TCL/Perl/Python; Git/SVN; cross-functional Agile.
UVM, SystemVerilog, VHDL, AXI, SPI, I2C, PCIe, UART, Gb Ethernet, TCL, Perl, Python, Git, SVN
2d
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Sr. Engineer, SoC Design Verification Engineer, System Management Controller
Boston or Santa Clara or Toronto
$100k-$500k/yr HybridFull Time
Proficiency in SystemVerilog, SV-UVM, Python, and C/C++; experience with test plans, verification infrastructure, hardware/software debugging, and distributed collaboration.
SystemVerilog, SV-UVM, Python, C, C++, Copilot, Cursor, Claude, UCIe, BoW, Cocotb
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