126 verilog jobs at 49 companies in Massachusetts
2mo
Save
Mark Applied
Hide
Senior Formal Verification Engineer
Santa Clara or Austin or Westford or Hillsboro
$168k-$311k/yr HybridFull Time
7+ YOE7+ years experience with formal verification, strong knowledge of Verilog/System Verilog, temporal logic assertions, abstraction techniques, scripting in TCL/Perl/Python, and solid understanding of CPU/GPU architectures.
Verilog, System Verilog, temporal logic assertions, TCL, Perl, Python, Jasper Gold, VC Formal, RTL
3mo
Save
Mark Applied
Hide
Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$104k-$192k/yr OnsiteFull Time
1+ YOEBachelor's in engineering or related; 1+ year industry/programming experience; RTL/Verilog/System Verilog and modem development experience; familiarity with synthesis, verification, Unix/Linux shell scripting, Python/Perl.
C, C++, Python, Verilog, System Verilog, Unix/Linux shell scripting, Perl, Makefiles, XML
1mo
Save
Mark Applied
Hide
Interconnect Design Engineer
Santa Clara or Cambridge or Austin or Boston
OnsiteFull Time
Staff-level hardware engineer with experience designing interconnects, cache/coherency, RTL generators using Chisel/Scala; proficiency in Verilog/System Verilog/VHDL and hardware-software engineering practices; BS/MS in EE/CE/CS or equivalent.
Chisel, Scala, FIRRTL, Verilog, System Verilog, VHDL, TileLink, RISC-V, NoC, AXI, AHB, APB, CHI, Bluespec, Git, GitHub, Jira, Confluence
1mo
Save
Mark Applied
Hide
Interconnect Micro-architect/RTL Design Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
2w
Save
Mark Applied
Hide
FPGA Engineering Intern - Summer 2027
Needham, Massachusetts, United States
$42/hr OnsiteInternship
Pursuing BS/MS in related field with 3.0+ GPA, experience with Verilog/SystemVerilog or VHDL, Linux, scripting (Python/Perl), strong communication skills.
Verilog/SystemVerilog, VHDL, Linux, Python, Perl, Vivado, Quartus
6d
Save
Mark Applied
Hide
Senior FPGA Design Engineer
Tewksbury or Marlborough
$87k-$165k/yr OnsiteFull Time
5+ YOESTEM degree and 5+ years of relevant experience required. Requires VHDL or Verilog, SystemVerilog, Xilinx or Microsemi experience, U.S. citizenship, and an active Secret clearance.
VHDL, Verilog, SystemVerilog, Xilinx, Altera, Microsemi, UVM, Veloce, ARM, Microblaze, Nios
3mo
Save
Mark Applied
Hide
Senior Engineer, Automotive Product and Test Engineering
Wilmington, Massachusetts, United States
$124k-$163k/yr HybridFull Time
2+ YOEMaster’s in Electrical/Electronics Engineering; 2+ years automotive product test; C/C++, Linux; Advantest V93000 ATE; PCB hardware; Verilog; Exensio or SAS JMP.
C++, Linux, Verilog, Advantest V93000 ATE, Exensio, SAS JMP, PCB design
1mo
Save
Mark Applied
Hide
Principal SerDes Systems Engineer
Boxborough, Massachusetts, United States
$165k-$247k/yr OnsiteFull Time
6+ YOEM.Sc. or Ph.D. in Electrical/Computer Engineering,6+ years experience in SerDes/communications, MATLAB/Simulink modeling, DSP and protocol expertise, lab testing and C/Verilog-A experience.
MATLAB/Simulink, C, Verilog-A, system Verilog, Python
2mo
Save
Mark Applied
Hide
System Engineer Support Principal (FPGA experience)
Bedford or United States
$170k-$192k/yr OnsiteFull Time
Full-time FPGA/system engineering role requiring TS/SAP clearance, US citizenship, BS in electronic/electrical engineering, FPGA/Verilog/VHDL, secure background.
Verilog, VHDL, FPGA, Xilinx Vivado, Microsemi Libero, Modelsim, Questa, PCIe, SERDES, LVDS, MATLAB, Simulink, UVM
5d
Save
Mark Applied
Hide
Principal Software Engineer - Compiler Development
Burlington, Massachusetts, United States
$118k-$218k/yr OnsiteFull Time
5+ YOERequires BS and 10+ years, MS and 7+ years, or PhD and 5+ years; 5+ years in compiler development, EDA, or HPC; expert C++, SystemVerilog or Verilog, and compiler theory.
C++, SystemVerilog, Verilog, LLVM, Python, UVM
2w
Save
Mark Applied
Hide
Electrical Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS/MS in Electrical or Computer Engineering,1-4 years EE experience,schematic design and FPGA RTL with Verilog,OrCAD proficiency,technical writing and strong communication skills.
OrCAD, Verilog, ModelSim, Quartus, Git, SVN, oscilloscope, logic analyzer, frequency generator
1mo
Save
Mark Applied
Hide
Senior Digital ASIC Design Engineer
Cambridge, Massachusetts, United States
$82k-$220k/yr OnsiteFull Time
5+ YOERequires 5+ years ASIC hardware engineering experience, bachelor's in engineering (master's preferred), proficiency with Cadence/Synopsys flows, SystemVerilog/Verilog/VHDL, and an active US Secret clearance.
Cadence, Synopsys, System Verilog, Verilog, VHDL, LINT
1w
Save
Mark Applied
Hide
Firmware Engineer
Bedford, Massachusetts, United States
$98k-$156k/yr OnsiteFull Time
3+ YOERequires 3+ years in firmware engineering with Verilog, a bachelor's degree in electrical engineering or related field, FPGA experience, signal processing, communication protocols, Agile/Kanban, and configuration management.
Verilog, MATLAB, C++, Python, FPGA, Lattice, Altera, CAN, SPI, I2C, UART, Ethernet, BiSS, oscilloscopes, logic analyzers, Microsoft Visio, Microsoft Excel, Microsoft Word, GitHub, Agile, Kanban, Atlassian Jira, Copilot
1mo
Save
Mark Applied
Hide
Senior ASIC Hardware Design Engineer
Westford, Massachusetts, United States
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or Master's in EE/CE/CS (or equivalent) with 5+ years industry experience; strong Verilog/SystemVerilog and RTL/microarchitecture experience; scripting in Perl or Python; understanding of physical implementation and VLSI.
Verilog, SystemVerilog, Perl, Python
2w
Save
Mark Applied
Hide
Senior FPGA Engineer
Norwood, Massachusetts, United States
OnsiteFull Time
7+ YOE7+ years FPGA/RTL experience, proficiency with RTL design and simulation, Verilog/SystemVerilog, Modelsim/VCS/Xcelium; BS/MS/PhD required; experience with AMD/Altera toolchains preferred.
Modelsim, VCS, Xcelium, Python, C/C++, Verilog, System Verilog
4w
Save
Mark Applied
Hide
Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
4+ YOEBachelor's in CS/EE or related with 4+ years (or Master's/PhD with 3+ years); experience with Verilog/SystemVerilog/UVM, C/C++, Python/Perl, Linux; strong verification and debugging skills.
Verilog, SystemVerilog, UVM, C, C++, Python, Perl, Linux
1w
Save
Mark Applied
Hide
Staff Analogue Designer, CMOS Modelling
Oxford or College Park or California or Colorado or Massachusetts or Tennessee or Washington or Italy or Korea or Sweden or Switzerland or Canada or United Kingdom
HybridFull Time
10+ YOERequires 10+ years of analogue and mixed-signal design and modelling experience, expert Verilog-A/AMS, real-number modelling, mathematical modelling, Cadence flows, and SystemVerilog, MATLAB, or Python/NumPy.
Verilog-A, Verilog-AMS, SystemVerilog, MATLAB, Python, NumPy, Cadence AMS Designer, Xcelium, Spectre, Virtuoso
2d
Save
Mark Applied
Hide
FPGA Verification Engineer
Waltham, Massachusetts, United States
$166k-$220k/yr OnsiteFull Time
8+ YOEBachelor's in electrical engineering, computer engineering, or related technical field; 8+ years developing FPGA HDL firmware; VHDL/Verilog, SystemVerilog, verification testbenches, Git or Subversion, and Secret clearance eligibility.
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, Unix, Linux, C, C++, Python, Perl, QuestaSim, Synplify, Quartus, Vivado
1mo
Save
Mark Applied
Hide
Mixed Signal Logic Design Engineer
Hillsboro or Santa Clara or Austin or Massachusetts
$164k-$232k/yr HybridFull Time
4+ YOEExpert-level Verilog/SystemVerilog RTL design, digital logic and RTL-to-GDSII flow knowledge; 4+ years industry experience (Master's) or 7+ years (Bachelor's); mixed-signal integration and debugging skills.
Verilog, SystemVerilog, EDA tools, Perl, TCL/Tk, Python, STA
1w
Save
Mark Applied
Hide
RTL Design Engineer (TERADYNE, North Reading, MA)
North Reading, Massachusetts, United States
$123k-$197k/yr OnsiteFull Time
5+ YOEBSEE or MSEE in electrical engineering or related field and 5+ years of experience. Requires Verilog RTL, logic design, synthesis, timing, CDC, STA, memory, serial, and Python, Tcl, or Make scripting experience.
Verilog, Python, Tcl, Make
Explore Jobs
Expand Your Job Search
Top Cities in Massachusetts for Verilog
- Verilog jobs in Boston, MA
- Verilog jobs in Worcester, MA
- Verilog jobs in Springfield, MA
- Verilog jobs in Lowell, MA
- Verilog jobs in Cambridge, MA
- Verilog jobs in New Bedford, MA
- Verilog jobs in Brockton, MA
- Verilog jobs in Fall River, MA
- Verilog jobs in Quincy, MA
- Verilog jobs in Lynn, MA
- Verilog jobs in Newton, MA
- Verilog jobs in Somerville, MA
- Verilog jobs in Lawrence, MA
- Verilog jobs in Framingham, MA
- Verilog jobs in Waltham, MA
- Verilog jobs in Haverhill, MA
- Verilog jobs in Malden, MA
- Verilog jobs in Brookline, MA
- Verilog jobs in Medford, MA
- Verilog jobs in Taunton, MA