81 vhdl jobs at 19 companies in Dallas, TX
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Staff Engineer AI/ML
Santa Clara or Richardson or Austin
$143k-$275k/yr OnsiteFull Time
5+ YOEMaster's with 10+ years or PhD with 5+ years; processor, microarchitecture, datapath, RTL, SystemVerilog, Verilog/VHDL, simulation, waveform debugging, timing, and power expertise required.
RISC-V, SystemVerilog, Verilog, VHDL, Perl, Python
1d
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Staff Engineer AI/ML
Santa Clara or Austin or Richardson
$143k-$275k/yr OnsiteFull Time
10+ YOEMaster's with 10+ years or PhD with 5+ years; expertise in CPU, vector or GPU architecture, RTL, SystemVerilog, Verilog or VHDL, microarchitecture, datapaths, verification, timing, power, and area.
SystemVerilog, Verilog, VHDL, Perl, Python, RISC-V, ARM, MIPS, GPUs, SIMD
3mo
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Senior FPGA Design Engineer
McKinney, Texas, United States
$87k-$165k/yr OnsiteFull Time
5+ YOESTEM degree with 5+ years FPGA design experience; VHDL/Verilog proficiency; experience with Xilinx/Altera/Microchip FPGAs; onsite in McKinney, TX; DoD Secret security clearance.
VHDL, Verilog, Xilinx FPGAs, Altera FPGAs, Microchip FPGAs, Python, Perl, C
3mo
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Project Engineer 1 - New College Grad 2025 - 2026 (E&C - Forth Worth, TX)
Fort Worth, Texas, United States
OnsiteFull Time
Bachelor’s degree in engineering required; experience or coursework with CAD, SolidWorks, Revit, Python, SCADA, MATLAB, or VHDL; strong communication and problem-solving skills; new college graduates encouraged.
CAD, SolidWorks, Revit, Python, SCADA, MATLAB, VHDL
1w
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FPGA Firmware Engineer
Richardson, Texas, United States
$131k-$150k/yr OnsiteFull Time
5+ YOEBachelor’s or master’s degree in electrical or computer engineering, 5+ years of FPGA/firmware experience, VHDL, Xilinx tools, Git workflows, occasional travel, and ability to obtain and maintain Secret clearance.
VHDL, Xilinx, Vivado, Questa, Git, MATLAB, Simulink, Linux, Python, C, C++, PCIe, DDR3, DDR4
3w
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Staff Engineer, FPGA Design (R5347)
Dallas, Texas, United States
$150k-$230k/yr OnsiteFull Time
Strong FPGA design, implementation, verification skills using VHDL/SystemVerilog; experience with timing closure, clock domain crossing, and high-performance digital communications; degree in STEM; Git proficiency.
VHDL, SystemVerilog, AMD/Xilinx development tools, Vivado, Git, TCL, AXI4, AXI-Stream, CI/CD
2mo
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Lead Electronics Design Engineer
Hampton or Greenbelt or Huntsville or Dallas or Houston or Denver or Mountain View or Edwards Air Force Base
$93k-$137k/yr OnsiteFull Time
3+ YOEBachelor's in EE/CE or related, 3+ years electronic design experience with SPICE tools, hands-on circuit design, FPGA/VHDL development, Altium/PSPICE familiarity, strong written and oral communication.
Altium Designer, PSPICE, VHDL, Field Programmable Gate Array (FPGA), Simulation Program with Integrated Circuit Emphasis (SPICE), oscilloscope, spectrum analyzer, logic analyzer
2mo
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Senior FPGA Engineer
Addison, Texas, United States
OnsiteFull Time
8+ YOEBSEE or equivalent, 8+ years FPGA development experience with Xilinx, strong VHDL skills, experience with video/audio pipelines and high-speed interfaces (PCIe, DDR, Ethernet, HDMI), AXI, Zynq, and lab debugging.
VHDL, Xilinx, Vivado, PCIe, DDR, Ethernet, HDMI, DisplayPort, DSI-2, GMSL, GigE, USB, AXI, Zynq, Linux, Logic Analyzer, Oscilloscope
2mo
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DFT Engineer (Design for Testability) - Staff
Richardson, Texas, United States
OnsiteFull Time
5+ YOEBachelor's or Master's in EE/CE (or equivalent experience), 5+ years DRAM or ASIC DFT experience, strong DFT fundamentals (scan, MBIST, JTAG), RTL experience (SystemVerilog/VHDL), and familiarity with semiconductor test flows.
SystemVerilog, VHDL
3mo
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FPGA Engineer (TX, Dallas-Fort Worth)
Dallas, Texas, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
FPGA design and development, IP cores, hardware security, languages (C/C++, Python, VHDL, Verilog), tools (Vivado, Quartus, GHDL), system integration, travel 10%, ability to obtain US government security clearance.
C/C++, Python, VHDL, Verilog, Tcl, Vivado, Questa, GHDL, Quartus Prime, Xilinx, Zynq, Versal, AXI, ACE, Avalon, IP Core, Simulation, cocotb, pyuvm, cryptography, System Integration
1mo
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Senior Specialist, Systems Engineer - FPGA & GPU (39548)
Greenville, Texas, United States
OnsiteFull Time
6+ YOE6+ years engineering experience or equivalent, FPGA/GPU design (VHDL/Verilog/CUDA), RF and radar knowledge, DSP skills, MATLAB and Python proficiency, experience with JIRA/DOORS, active Secret or recent TS/SCI clearance.
VHDL, Verilog, CUDA, MATLAB, Python, JIRA, Confluence, DOORS, spectrum analyzers, signal generators, oscilloscopes, vector signal analyzers, AWG, SDR platforms
3w
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Sr FPGA Engineer
Richardson, Texas, United States
$150k-$163k/yr OnsiteFull Time
8+ YOEBS/MS in Electrical Engineering with 8+ years experience, FPGA DSP design using Xilinx ISE/Vivado and VHDL, FPGA interfaces (PCIe, DDR3), MATLAB/Simulink, C and Linux experience, ability to obtain DoD Secret clearance.
Xilinx ISE, Vivado, VHDL, MATLAB, Simulink, PCIe, DDR3, Linux, C, oscilloscope, spectrum analyzer, signal generator, logic analyzer
2mo
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DFT Engineer (Design for Testability) - Staff
Richardson, Texas, United States
OnsiteFull Time
5+ YOEBachelor's/Master's in EE/CE or equivalent, strong digital design and DFT fundamentals (scan, MBIST, JTAG), RTL experience (SystemVerilog/VHDL), familiarity with semiconductor test flows, and 5+ years DRAM or ASIC DFT design/verification experience.
SystemVerilog, VHDL, RTL, JTAG, MBIST
1mo
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Technical Staff Engineer - Applications
San Jose or Addison or Allentown or Hauppauge
$91k-$232k/yr HybridFull Time
12+ YOEBachelors in EE/Comp Eng/Science required (Masters preferred); 12+ years FPGA architecture/design experience; 5+ years lab equipment use; expert VHDL/Verilog and C; experience with Libero/Vivado/Quartus, Linux, Keil/IAR/Eclipse, EDA tools; strong communication.
Libero, Vivado, Quartus, Keil, IAR, Eclipse, Linux, C, VHDL, Verilog, RISC-V, EDA tools, Oscilloscopes, Signal analyzers
3w
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Principal Analog Sustaining Engineer
Plano, Texas, United States
HybridFull Time
12+ YOE12+ years IC design experience focused on debug/failure analysis of mixed-signal PMICs; expertise in waveform and silicon analysis, FA techniques, customer-facing documentation, and cross-functional collaboration.
Synopsys, Cadence, oscilloscope, logic analyzer, Verilog, Verilog-AMS, SEM, FIB, emission microscopy
1mo
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RTL Design/AMS Verification Engineer
Richardson, Texas, United States
RemoteFull Time
5+ YOE5+ years IC design experience; Verilog RTL design and verification experience; Cadence/Synopsys flows; AMS simulation, synthesis and APR; Bachelor's degree in Electrical Engineering; US work authorization (ITAR) required.
Verilog, Cadence, Synopsys, Python, Perl, Tcl, SKILL
1mo
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Senior Principal Digital SoC Architect
Richardson, Texas, United States
OnsiteFull Time
12+ YOE5+ MgmtB.S./M.S. in Electrical/Computer Engineering,12+ years semiconductor digital design experience,5+ years lead SoC architecture,experience with ARM/RISC-V,NoC,memory subsystems,FuSa (ISO 26262),SystemC/Simulink,Verilog/SystemVerilog.
ARM Cortex-M, RISC-V, SystemC, MATLAB, Simulink, Verilog, SystemVerilog, UPF, CAN-FD, LIN, SPI, I2C, I3C, Ethernet, SENT, HSM, Evita
2mo
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Principal Engineer DSP Design
Dallas, Texas, United States
HybridFull Time
7+ YOEB.S. +10 years or M.S. +7 years in EE/Computer Engineering; strong DSP and digital communications fundamentals; high-speed wireline DSP experience (FFE/DFE, CDR, FEC); C++ and MATLAB proficiency; Verilog/SystemVerilog HDL experience.
Verilog, SystemVerilog, MATLAB, C, C++
1mo
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Digital IC Design Engineer
Dallas, Texas, United States
OnsiteFull Time
1+ YOEBachelor's in EE/CE or related; 1+ years digital IC design experience; proficiency in RTL (Verilog/SystemVerilog), functional verification, synthesis/static timing, low-power techniques; exposure to SPI/I2C/UART; scripting (Python, Tcl, Perl).
Verilog, SystemVerilog, Synopsys Design Compiler, Cadence Genus, Python, Tcl, Perl
3w
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Hardware Designer
Dallas or United States
RemoteFull Time
5+ YOE5+ years electronics design experience, Bachelor's in Electrical/Computer Engineering, strong high-speed PCB and system design skills, FPGA familiarity, lab bring-up and verification, Cadence/OrCAD/LTSpice experience.
LTSpice, OrCAD Capture CIS, Cadence Allegro, Verilog, HLS, signal analyzer, oscilloscope, optical test set, signal generator, electronic load, VNA
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