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27 asic engineer jobs at 16 companies in Wayne, NJ

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Distinguished Engineer, ASIC (CONTRACT)
Burlington or New York or San Francisco
HybridContract, Temporary
Butterfly Network
Butterfly NetworkNYSE: BFLY: Handheld whole-body ultrasound scanners powered by semiconductor technology.
8+ YOE8–12+ years in digital IC/ASIC/SoC design; strong RTL SystemVerilog; tapeout experience; cross-functional collaboration.
SystemVerilog, Verilog, RTL, ASIC, SoC, clock_domain, PPA tools
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3mo
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ASIC Design Engineer IV
New York, New York, United States
$101k-$243k/yr RemoteFull Time
Arcfield
Arcfield: Systems engineering and mission support for defense and space.
8+ YOESenior ASIC design engineer with 8-10 years hardware/EE/VHDL experience; secret clearance; Xilinx FPGA; Cadence Virtuoso; ModelSim/QuestaSim; VHDL/Verilog/SystemVerilog.
VHDL, Verilog, SystemVerilog, ModelSim, QuestaSim, Xilinx FPGA, Cadence Virtuoso, Synopsys, Genus
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2mo
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ASIC Physical Design Engineer
New York, New York, United States
$250k-$300k/yr OnsiteFull Time
Jane Street
Jane Street: Global quantitative trading firm and liquidity provider.
Experience with physical design flows (floorplanning, place-and-route, timing closure, P&R, physical verification, power analysis); able to own a flow end-to-end; read/write RTL; cross-stack thinking; programming in Python, C++, or similar.
Python, C++, RTL, OCaml, Haskell
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3w
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ASIC Technical Lead- DFT
San Jose or New York City or New York or Washington or Illinois or United States or Canada
$211k-$305k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
10+ YOEBachelor's or Master's in Electrical/Computer Engineering with 10+ years experience; expertise in JTAG, scan and BIST architectures, ATPG and EDA toolsets (TestMax, Tetramax, Tessent, PrimeTime); SystemVerilog/Verilog and post-silicon debug experience.
JTAG, ATPG, TestMax, Tetramax, Tessent, PrimeTime, System Verilog, Verilog
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3w
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Principal Digital Design Engineer (ASIC)
Somerset or Wilmington
$160k-$239k/yr OnsiteFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
10+ YOE10+ years ASIC/SoC digital design experience, Bachelor’s degree in EE/CE, expertise in SystemVerilog/Verilog, RTL design, synthesis, timing closure, MATLAB/TCL/Python modeling, Cadence tools, and tapeout experience.
SystemVerilog, MATLAB, Verilog, Python, TCL, Cadence, UVM
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Two Sigma Securities, Hardware Engineer
New York City, New York, United States
$165k-$300k/yr HybridFull Time
Two Sigma
Two Sigma: Systematic investment management and quantitative trading firm.
1+ YOEMinimum 1 year RTL design and verification experience, proficiency in SystemVerilog and Python, FPGA/ASIC knowledge, timing analysis, network protocol familiarity; C++ is a plus.
SystemVerilog, Python, FPGA, ASIC, C++
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FPGA Engineer
Amsterdam or Chicago or London or New York City or Singapore
OnsiteFull Time
Headlands Technologies
Headlands Technologies: A global proprietary trading firm utilizing quantitative algorithms.
Professional FPGA/ASIC design and verification experience; SystemVerilog/Verilog/VHDL and C++; familiarity with EDA tools and scripting (TCL, Python, Bash); university degree in EE/CS/CE or related.
SystemVerilog, Verilog, VHDL, C++, TCL, Python, Bash, EDA
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2mo
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Design Verification (DV) Engineer
Austin or Boulder or Chicago or London or New York City
$175k-$250k/yr OnsiteFull Time
Hudson River Trading
Hudson River Trading: A quantitative firm using technology to trade global financial markets.
2+ YOE2+ years RTL verification for FPGA/ASIC; SystemVerilog/UVM; Python; Linux; Verilator; Cocotb; C++ is a plus.
SystemVerilog, UVM, Python, Verilator, Cocotb, Linux, C++
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2w
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RTL Design Engineer
New York City or Palo Alto or London
$205k-$285k/yr HybridFull Time
Normal Computing
Normal Computing: Building probabilistic AI and thermodynamic computing for semiconductor design.
Production SystemVerilog RTL experience, verification with UVM/cocotb/formal, taped-out silicon, ASIC/SoC design background, simulation and timing collaboration experience.
SystemVerilog, UVM, cocotb, formal, Chipyard, OpenTitan, CVA6, RISC-V
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Digital Modem Engineer
Austin or Chicago or New York City or London
$150k-$250k/yr OnsiteFull Time
Jump Trading
Jump Trading: Global proprietary trading firm specializing in algorithmic and high-frequency strategies
5+ YOE5+ years in digital modem design, modeling, and implementation; strong FPGA/ASIC knowledge; Python/C/C++/Matlab; MS/PhD in EE/CS or equivalent.
Python, C++, C, Matlab
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Failure Analysis Engineering Manager, GPU ASIC and PCBA Debug
Secaucus, New Jersey, United States
$129k-$221k/yr OnsiteFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
3+ MgmtProven people manager with 3+ years management experience; deep GPU ASIC and PCBA debug and failure analysis expertise; hands-on lab experience (oscilloscopes, logic analyzers); proficient in Python and shell; Windows/Linux experience; bachelor’s degree in EE/CE or related.
Python, Shell, Windows, Linux, Oscilloscope, Logic Analyzer
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5d
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Research Engineer, Chip Design RL (Reinforcement Learning)
San Francisco or New York City
$500k-$850k/yr HybridFull Time
Anthropic
Anthropic: Developing safe and reliable artificial intelligence systems.
Bachelor's or equivalent, expertise in ASIC/FPGA design and EDA tools, experience with RTL, verification (UVM, formal methods), physical design and tapeout experience; RL experience and tooling experience preferred.
EDA tools, UVM, formal methods, place-and-route
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3w
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Senior Network Solution Engineer (Weekend Coverage)
Santa Clara or Westford or Austin or Durham or Redmond or New York
$140k-$270k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOE5+ years software development (C, C++, Python, or Go) in the networking industry, 5+ years supporting in-field production network equipment, bachelor's degree or equivalent, experience with Linux NIC drivers/ASICs/firmware/network OS, expert Ethernet/IP knowledge.
C, C++, Python, Go, Linux, InfiniBand, NVLink, Spectrum-X
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3w
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
BAE Systems
BAE SystemsLondon Stock Exchange: BA: Provides advanced defense, aerospace, and security technology solutions.
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
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2mo
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Quantum Control Systems Engineer (Hardware & Embedded Systems)
Yorktown Heights, New York, United States
$140k-$180k/yr OnsiteFull Time
IBM
IBMNew York Stock Exchange: IBM: Global technology providing enterprise software, cloud, and consulting.
Bachelor's in EE/CE/Physics required; proficiency in Python, Jupyter Notebooks, Git, Linux; experience with embedded systems, lab instrumentation, debugging, and hardware/software integration.
Python, Jupyter Notebooks, Git, Linux, C, VHDL, assembly language, FPGA, microcontrollers, SCPI, Cadence, Vivado, oscilloscopes, VNAs, spectrum analyzers, TDRs, ISA, ASIC
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Inference Performance Engineer
New York, New York, United States
HybridFull Time
Material
Material: Specialized inference cloud platform for high-performance AI workloads.
BS in CS/EE or related field; proficiency in Rust/Go/Python/C++; knowledge of concurrency, tail latency; experience with model serving; GPU/ASIC programming; low-precision inference; profiling and benchmarking.
Rust, Go, Python, C++, vLLM, TensorRT-LLM, llama.cpp, CUDA, ROCm, Triton, TGI, SGLang, Nsight, perf
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