2mo
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Junior Engineer, FPGA
Princeton, New Jersey, United States
$60k-$62k/yr OnsiteFull Time
FPGA design with Verilog/VHDL or HLS; testbench development; target/retarget FPGA designs; knowledge of Verilog, VHDL, SystemVerilog and C; experience with timing closure and Xilinx boards; document design data sheets.
Verilog, VHDL, SystemVerilog, C, Xilinx tools, FPGA
1mo
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Senior FPGA Engineer
Chicago or New York City or London
$225k-$325k/yr OnsiteFull Time
3+ YOEBachelor's in Computer or Electrical Engineering, 3+ years FPGA/hardware engineering experience, RTL/Verilog expertise, FPGA design flow experience, knowledge of TCP/IP, strong autonomous and problem-solving skills.
Verilog, System Verilog, RTL, XILINX, ALTERA, TCP/IP, synthesis, place & route, static timing analysis
1mo
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FPGA Engineer
Amsterdam or Chicago or London or New York City or Singapore
OnsiteFull Time
Professional FPGA/ASIC design and verification experience; SystemVerilog/Verilog/VHDL and C++; familiarity with EDA tools and scripting (TCL, Python, Bash); university degree in EE/CS/CE or related.
SystemVerilog, Verilog, VHDL, C++, TCL, Python, Bash, EDA
4d
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FPGA Engineer - Control Systems
Princeton, New Jersey, United States
$150k-$235k/yr OnsiteFull Time
Experienced in FPGA/ASIC digital logic design and verification, RTL and low-latency firmware for multi-domain clock systems; familiarity with Xilinx/AMD RFSoC platforms preferred.
RTL, FPGAs, ASICs, Xilinx, AMD, RFSoC
3w
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FPGA Design Engineer
New York City, New York, United States
$200k-$280k/yr OnsiteFull Time
Proven FPGA experience bringing RTL to timing-closed hardware; expert SystemVerilog/VHDL and Xilinx Vivado; PCIe and common bus protocols; strong Python/C++ for automation; board bring-up and lab debugging skills.
SystemVerilog, VHDL, Xilinx Vivado, ILA, Vivado Analyzer, Python, C++, PCIe, AXI, AHB, SPI, UART, JTAG, HAPS, VCU118, VPK180, Cocotb, UVM, OSVVM, hls4ml, FINN, GitLab CI, Docker, oscilloscope, logic analyzer
1mo
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Senior Firmware Engineer, FPGA
New York or Bellevue
$182k-$242k/yr OnsiteFull Time
5+ YOE5+ years firmware/embedded/FPGA experience; Intel/Altera FPGA development with Quartus; Verilog/SystemVerilog and C/C++; board bring-up, hardware validation, and cross-layer debugging; familiarity with I2C/SPI/UART/PCIe, Linux and Git; strong communication skills.
Quartus, Intel/Altera, Verilog, SystemVerilog, C, C++, Python, Bash, Linux, Git, JTAG, logic analyzers, oscilloscopes, Redfish, IPMI, SMBus, LTPI, PCIe, I2C, SPI, UART, GPIO, CPLD, BMC, BIOS
2w
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Hardware Engineer (FPGA/ASIC)
New York, New York, United States
$300k/yr OnsiteInternship
Comfortable with a programming language; experience with hardware description languages (VHDL, Verilog, Chisel, Pymtl) and FPGA/ASIC projects; familiar with vendor tools (Vivado, Quartus, Genus, Innovus).
Hardcaml, OCaml, VHDL, Verilog, Chisel, Pymtl, Vivado, Quartus, Genus, Innovus
2d
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Lead Software Engineer - C++, FPGA, Low Latency, Electronic Trading
Jersey City, New Jersey, United States
$152k-$215k/yr OnsiteFull Time
5+ YOE5+ years software engineering experience with modern C++ on Unix/Linux, low-latency systems, multithreading, networking, scripting (Python/Perl/Shell), and experience integrating FPGA hardware.
C++, FPGA, Python, Perl, Shell, Unix, Linux, TCP/IP, PCIe, FIX, SBE, Solarflare Ethernet NIC, CI/CD
4w
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
3w
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Firmware Software Engineer
Dover, New Jersey, United States
OnsiteFull Time
US citizen able to obtain security clearance; bachelor's in engineering; hands-on lab/R&D experience; firmware/software development in C/C++/C#; embedded Linux; FPGA/HDL familiarity; strong analytical and communication skills.
C, C++, C#, Embedded Linux, FPGA, HDL, Microchip Masters Workshop
1w
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Electrical Design/Firmware Engineer II
Farmingdale, New York, United States
$99k-$165k/yr OnsiteFull Time
5+ YOE5+ years experience in firmware/hardware development for embedded systems; Bachelor’s in Electrical Engineering; experience with FPGA (VHDL/Verilog), embedded microcontrollers, peripherals, and DO-254/DO-178C standards.
FPGA, VHDL, Verilog, ARM, PowerPC, UART, SPI, I2C, Ethernet, PCIe, MIL-STD-1553, ARINC-429, DO-254, DO-178C, Git, SVN
1w
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Two Sigma Securities, Hardware Engineer
New York City, New York, United States
$165k-$300k/yr HybridFull Time
1+ YOEMinimum 1 year RTL design and verification experience, proficiency in SystemVerilog and Python, FPGA/ASIC knowledge, timing analysis, network protocol familiarity; C++ is a plus.
SystemVerilog, Python, FPGA, ASIC, C++
1mo
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Embedded Systems Engineer
Kearny, New Jersey, United States
$110k-$150k/yr OnsiteFull Time
5+ YOE5+ years in embedded/control development for high-power systems; experience with ARM, FPGA/SoC, DSP, real-time control, MATLAB/Simulink, power electronics control and protection, industrial comms protocols; bachelor’s in EE or related.
ARM Cortex-M, ARM Cortex-A, STM32, NXP, C/C++, FreeRTOS, Zephyr, FPGA, SoC (Xilinx), Xilinx, TI DSP (C2000), Quench detection, MATLAB/Simulink, PLECS, UART, SPI, CAN, Modbus, Modbus TCP, OPC UA, EtherCAT, CANopen, Python, Verilog/VHDL, NI PXIe, CompactRIO, STM32CubeIDE, Keil, PlatformIO, LabVIEW, PTP/White Rabbit
1mo
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Senior Engineer
East Farmingdale, New York, United States
$95k-$125k/yr OnsiteFull Time
5+ YOEBS in Electrical Engineering, 5+ years circuit board design experience, US citizenship with ability to obtain DOD security clearance, mixed-signal schematic and PWB layout experience, FPGA/DSP interfacing, and technical report writing.
VHDL, Atlassian Tool Suite
1w
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Senior Low Latency Engineer - Vice President
New York, New York, United States
$155k-$200k/yr OnsiteFull Time
15+ YOEExpertise in multicast market data, TCP/IP internals, packet analysis, Cisco/Arista platforms, FPGA integration, and automation (Python/Ansible); 15+ years preferred.
Corvil, cPacket, tcpdump, Wireshark, Python, Ansible, Cisco, Arista, FPGA
1mo
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Embedded Senior Hardware Engineer
Yerevan or New York City or Armenia or Israel or Ukraine
RemoteFull Time
6+ YOE6+ years experience in digital and mixed-signal hardware design with hands-on board bring-up, hardware debug, basic microcontroller firmware (C/C++), and FPGA integration/debug familiarity; able to work autonomously in a remote environment.
C, C++, VHDL, Verilog, I²C, SPI, UART, GPIO, FPGA
2w
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Principal Hardware Engineer - Hardware Development Lead
Nashua or Totowa
HybridFull Time
6+ YOEBSEE or related and 6+ years experience in digital/mixed-signal designs with embedded processors, FPGAs, and high-speed serial interfaces; leadership of multidisciplinary teams; hardware lifecycle knowledge; ability to obtain DoD clearance.
FPGA, EVM, CAM
1w
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Digital Engineer V
Huntsville or Exeter or Plainview or Hauppauge or Colorado Springs or Colorado
$150k-$200k/yr OnsiteFull Time
10+ YOEBachelor's in Electrical or Computer Engineering, minimum 10 years experience in digital hardware design, expertise in FPGA and high-speed interfaces, signal/power integrity, schematic capture, and hardware verification.
Siemens DXDesigner, Altium Designer, Hyperlynx SI/PI
1mo
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Quantum Error Correction Control Systems Engineer
Yorktown Heights or San Jose or Cambridge
$157k-$219k/yr HybridFull Time
Bachelor's degree required. Experience with prototyping, resource estimation, or real-time software; strong software skills in Python, Rust, or C++; collaboration with cross-disciplinary teams. Preferred: quantum information, RF/microwave control systems, FPGA/HDL.
Python, Rust, C++, FPGA, HDL, RF, microwave
2mo
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Design Verification (DV) Engineer
Austin or Boulder or Chicago or London or New York City
$175k-$250k/yr OnsiteFull Time
2+ YOE2+ years RTL verification for FPGA/ASIC; SystemVerilog/UVM; Python; Linux; Verilator; Cocotb; C++ is a plus.
SystemVerilog, UVM, Python, Verilator, Cocotb, Linux, C++
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