22 asic jobs at 13 companies in Scottsdale, AZ
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ASIC and Custom Silicon Sales Leader
Santa Clara or Hillsboro or Folsom or Phoenix
$454k-$641k/yr HybridFull Time
12+ YOE5+ MgmtBachelor's in EE/CE or related; 12+ years in semiconductor/ASIC/SoC/foundry/silicon solution sales; 5+ years people management; deep ASIC market knowledge, executive relationships, financial acumen, and ability to travel globally.
2mo
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Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
Scottsdale, Arizona, United States
$123k-$136k/yr HybridFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (or Master's+3), U.S. citizenship, ability to obtain TS/SCI, proficiency in VHDL/Verilog, scripting (Tcl/Python/Perl), and ASIC/FPGA design and verification.
Microsoft Office, VHDL, Verilog, Tcl, Python, Perl, Xilinx, Microchip, ISE, Vivado, Libero, Precision, Synplify, QuestaSim, UVM, Questa CDC, Oscilloscope, Logic Analyzer, ChipScope, SystemVerilog, SVA, OVM
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ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yr RemoteFull Time
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
Cadence Sigrity, Ansys HFSS, Keysight ADS, Cadence APD, Ansys EM, SPICE, Vector Network Analysis, IBIS
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Principal Engineer Electrical
Gilbert, Arizona, United States
$98k-$148k/yr OnsiteFull Time
5+ YOEBachelor’s degree in STEM with 5 years’ experience, master’s with 3 years, or PhD with 1 year. Requires aerospace RTL design, FPGA design flow, simulation, synthesis, place-and-route, and timing analysis experience.
Electronic Design Automation (EDA) Tools, Xilinx ISE, Xilinx Vivado, Mentor Graphics ModelSim, Mentor Graphics QuestaSim, Synplify, SystemVerilog, Universal Verification Methodology (UVM), Signal Generators, Logic Analyzers, Digital Oscilloscopes, Embedded FPGA Debugging tools
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Principal Engineer
Chandler, Arizona, United States
$174k/yr OnsiteFull Time
5+ YOEBachelor's degree in electrical, electronic, or computer engineering and 5 years of progressive experience. Requires ARM, SystemVerilog, UVM, ASIC verification, SOC testbench, simulations, regression management, and C-based testing.
ARM, I2C, SPI, SPMI, UART, SOC Testbench, SystemVerilog, UVM, GLS, ASIC, C
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Staff Digital Systems Engineer
Phoenix, Arizona, United States
$185k-$202k/yr OnsiteFull Time
10+ YOEBachelor's in EE/CE, 10+ years designing FPGA/ASIC/SoC-based digital hardware, board bring-up and lab debug, high-speed interface and timing analysis, signal integrity collaboration, strong communication and leadership.
FPGA, ASIC, DDR, PCIe, Ethernet, SerDes, LVDS, SPI, I2C, Linux
3d
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Semiconductor Engineer I
Phoenix, Arizona, United States
HybridFull Time
0.5+ YOEBachelor’s degree in a technical discipline and at least 6 months of ASIC/FPGA design language experience with VHDL, Verilog, or SystemVerilog; communication skills required.
VHDL, Verilog, SystemVerilog, HDL, Microsoft Office, UNIX, Linux, DO-254
1d
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Senior Digital Design Engineer
Vancouver or Chandler or San Francisco
$150k-$200k/yr HybridFull Time
6+ YOEBachelor's or master's degree in electrical or computer engineering, 6+ years of digital IC design experience, and hands-on Verilog or SystemVerilog RTL development for complex SoCs or ASICs.
Verilog, SystemVerilog, Synopsys, Cadence, SDC, UPF, CPF
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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Senior Digital Engineer
Chandler, Arizona, United States
OnsiteFull Time
5+ YOE5+ years digital design experience, degree in electrical/computer discipline, fluent Verilog/SystemVerilog, ASIC methodology, lint/CDC/RDC experience, RTL and gate-level debug, English proficiency, willing to travel.
Verilog, SystemVerilog, Lint, CDC, RDC, UPF, UVM, AMBA, I2C, STA
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Senior Principal Mixed Signal Design Engineer (Hybrid)
Goleta or Phoenix
$146k-$277k/yr HybridFull Time
10+ YOESTEM degree with 10+ years of relevant experience or advanced degree with 7+ years; requires mixed-signal ASIC/ROIC, CMOS IC design, semiconductor processing, simulation, layout, testing, and team leadership experience.
Cadence, Mentor Graphics, MATLAB, Python, UNIX, SystemVerilog, Verilog-AMS, Conformal, Innovus, RTL
2w
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Senior Design Verification Engineer
Tempe or Independence
$156k-$291k/yr RemoteFull Time
8+ YOE8+ years design verification experience with UVM, SystemVerilog, RTL verification for FPGA/ASIC, Bachelor's in EE/CE, US citizenship, ability to obtain Secret clearance, familiarity with Questa/Xcelium/VCS and AI verification tools.
Universal Verification Methodology (UVM), SystemVerilog, VHDL, Verilog, Questa, Xcelium, VCS, Jira
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DFT Engineer (CE-64000920)
Austin or Chandler or Greensboro
HybridFull Time
2+ YOEMSEE with 2+ years or BS with relevant experience; hands-on ASIC DFT design and verification; experience with FastScan, TestKompress, TetraMAX, Test Compiler; MBIST, scan/ATPG, Verilog/SystemVerilog/VHDL; scripting (Perl, Python, TCL); strong communication.
FastScan, TestKompress, TetraMAX, Test Compiler, Verilog, SystemVerilog, VHDL, Perl, Python, TCL
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Principal Engineer Electrical
Gilbert, Arizona, United States
$98k-$148k/yr OnsiteFull Time
5+ YOEBachelor's in STEM +5 years (or Master's +3 / PhD +1) experience in RTL/HDL FPGA/ASIC design for aerospace/space, proficiency in FPGA design flow, verification, synthesis, timing and power analysis; strong communication and problem solving.
HDL, RTL, Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify, System Verilog, Universal Verification Methodology (UVM), Signal Generators, Logic Analyzers, Digital Oscilloscopes, Embedded FPGA Debugging tools
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