87 design verification engineer jobs at 39 companies in Blackstone, MA
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Staff Engineer, Design Verification Engineering
Wilmington, Massachusetts, United States
$172k-$210k/yr HybridFull Time
4+ YOEMaster's+4yrs or Bachelor's+6yrs in relevant engineering; experience with System Verilog and UVM, metric-driven verification, simulation debug, IP/VIP integration, verification planning, and scripting for automation.
UVM, System Verilog
3mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
2mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
1mo
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Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
2w
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Design Verification Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
Responsible for verifying the functionality and performance of Apple's system-on-chip products; the posting does not specify education, certifications, or experience requirements.
3mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE or related,5+ years hardware verification experience with SystemVerilog/UVM,experience with industry EDA tools,US citizenship and active Secret clearance required,ability to travel up to 10%.
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, AMD/Xilinx Vivado, Altera Quartus, Microchip Libero, TCL, Perl, Python, Linux
1mo
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Senior Staff Design Verification Engineer – Coherent Interconnect
Boston or Austin
OnsiteFull Time
8+ YOE8+ years ASIC/SoC design verification experience, strong SystemVerilog and Python skills, deep knowledge of cache-coherent interconnects and protocols (CHI, ACE, CXL, AXI), BS/MS in EE/CE/CS, strong communication and leadership.
SystemVerilog, Python
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Design Verification Engineer – Physical AI Compute
Santa Clara or Austin or Boston
$75k-$275k/yr OnsiteFull Time
Experience verifying complex digital/SoC systems with SystemVerilog/UVM, C/C++, assertions, formal, emulation and debugging across HW/SW boundaries.
SystemVerilog, UVM, C, C++, formal verification, emulation, FPGA
2w
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Formal Verification Engineer
Austin or Boston or Santa Clara
$127k-$217k/yr HybridFull Time
8+ YOERequires 8+ years in design verification focused on formal verification, VC Formal or JasperGold, SystemVerilog Assertions, TCL/Python/Perl, and a bachelor's or master's degree in computer or electrical engineering.
VC Formal, JasperGold, SystemVerilog Assertions (SVA), TCL, Python, Perl
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
1d
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Sr. Engineer, SoC Design Verification Engineer, System Management Controller
Boston or Santa Clara or Toronto
$100k-$500k/yr HybridFull Time
Proficiency in SystemVerilog, SV-UVM, Python, and C/C++; experience with test plans, verification infrastructure, hardware/software debugging, and distributed collaboration.
SystemVerilog, SV-UVM, Python, C, C++, Copilot, Cursor, Claude, UCIe, BoW, Cocotb
2mo
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Mechanical Design Engineer
Hudson, Massachusetts, United States
$80k-$100k/yr OnsiteFull Time
5+ YOEBachelor's in Mechanical Engineering (ABET), 5+ years mechanical design experience, 3+ years SolidWorks, COSMOS experience preferred, heavy-structure and subsystem design, vendor sourcing, verification and validation.
SolidWorks, COSMOS
1mo
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MTS, Analog Design Engineer
East Greenwich, Rhode Island, United States
$128k-$219k/yr OnsiteFull Time
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
8+ YOEBS or MS in Electrical Engineering,8+ years mixed-signal design/verification,strong CMOS analog skills,experience with charge pumps,LDOs,gate drivers,debugging silicon,and leading simulations and verification.
Simplis, MATLAB, Cadence Spectre
2d
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Sr. ASIC Verification Engineer (TERADYNE, North Reading, MA)
North Reading, Massachusetts, United States
$155k-$308k/yr OnsiteFull Time
8+ YOEBachelor’s degree in a relevant technical field and 8+ years of ASIC/SoC verification experience. Requires SystemVerilog, UVM, SystemC, C++, OOP, scripting, EDA tools, and complex digital design verification expertise.
SystemVerilog, UVM, SystemC, C++, Python, Perl
2w
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Austin or Westford or Durham or California
$136k-$265k/yr HybridFull Time
5+ YOEBachelor's or master's degree in engineering or computer science, 5+ years' experience, ASIC workflows, UVM, Verilog/SystemVerilog, simulation tools, and Python, Perl, or systems programming.
Python, Perl, Verilog, SystemVerilog, UVM, VCS, Verdi, Xcelium
1w
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of regulated medical-device software verification experience, IEC 62304 and FDA design-control knowledge, strong communication, and onsite hardware-testing availability.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC
1w
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Senior Software Verification Engineer
Burlington, Massachusetts, United States
$78k-$156k/yr OnsiteFull Time
5+ YOERequires 5+ years of software verification experience in medical devices or regulated industries, IEC 62304 and FDA design control knowledge, and strong communication skills. Python and mobile or embedded testing experience preferred.
Squish, Appium, XCUITest, Espresso, Python, Java, C, C++, iOS, Android, BLE, Wi-Fi, Cellular, NFC, IEC 62304, ISO 13485, FDA
2d
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Senior Principal Hardware Design Engineer
Tewksbury or Marlborough
$132k-$252k/yr OnsiteFull Time
10+ YOESTEM degree and 10+ years of electrical engineering experience in digital or mixed-signal high-speed CCA design, including PCB design, analysis, testing, and verification; ability to obtain an interim Secret clearance and U.S. citizenship required.
ECAD, PWB, PCB, FPGA, JESD204B, DDR3, DDR4, SERDES, 10G+ Ethernet, Fiber Channel, LVDS, logic analyzers, oscilloscopes, phase noise analyzer (PNA), spectrum analyzer
2w
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Westford or Austin or Durham or California
$136k-$265k/yr OnsiteFull Time
5+ YOEBS/MS or equivalent experience; 5+ years relevant experience; ASIC workflows, UVM, Verilog/SystemVerilog, simulation/debug tools, Python or Perl, and root-cause analysis skills required.
UVM, Verilog, SystemVerilog, VCS, Verdi, Xcelium, Python, Perl
2mo
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Engineer: Sr. Electrical Design Engineer
Cambridge, Massachusetts, United States
$80k-$110k/yr OnsiteFull Time
5+ YOEMaster's in EE, 5+ years product development experience, PCB and embedded hardware design, Altium/Eagle, C/Assembly, verification/validation, FDA/ISO 13485 experience, LabVIEW/MATLAB/Simulink familiarity.
Altium, Autodesk Eagle, C, Assembly, Verilog, VHDL, FPGA, ASIC, LabVIEW, MATLAB, Simulink, Java, Android, oscilloscopes, logic analyzers
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