41 design verification engineer jobs at 21 companies in Durham, NH
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Staff Engineer, Design Verification Engineering
Wilmington, Massachusetts, United States
$172k-$210k/yr HybridFull Time
4+ YOEMaster's+4yrs or Bachelor's+6yrs in relevant engineering; experience with System Verilog and UVM, metric-driven verification, simulation debug, IP/VIP integration, verification planning, and scripting for automation.
UVM, System Verilog
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
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Design Verification Engineer, PLM
Portsmouth, New Hampshire, United States
OnsiteFull Time
2+ YOEBachelor's in engineering and 2+ years experience in design, development, and testing; knowledge of design control, validation, and regulatory standards; proficiency with test documentation and engineering change processes.
Azure DevOps, JIRA, Greenlight Guru, SAP
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
3mo
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Design Verification Test (DVT) Manager
Derry, New Hampshire, United States
$125k-$140k/yr OnsiteFull Time
5+ YOE3+ MgmtBachelor's in engineering; 5 years product validation/certification; 3+ years management in test/verification; knowledge of safety design/test; experience with certifications (UL) and ISO; create test processes/reports; support factory releases.
2d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Austin or Westford or Durham or California
$136k-$265k/yr HybridFull Time
5+ YOEBachelor's or master's degree in engineering or computer science, 5+ years' experience, ASIC workflows, UVM, Verilog/SystemVerilog, simulation tools, and Python, Perl, or systems programming.
Python, Perl, Verilog, SystemVerilog, UVM, VCS, Verdi, Xcelium
3d
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Material Verification Engineer
Manchester, New Hampshire, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEBachelor’s degree in STEM and 5 years of engineering experience in quality, or advanced degree and 3 years; 9+ years without degree. Requires RCCA, design analysis, U.S. citizenship, and active Secret clearance.
PRISM, WaveTrak, RCAS, RTX CORE
2d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Westford or Austin or Durham or California
$136k-$265k/yr OnsiteFull Time
5+ YOEBS/MS or equivalent experience; 5+ years relevant experience; ASIC workflows, UVM, Verilog/SystemVerilog, simulation/debug tools, Python or Perl, and root-cause analysis skills required.
UVM, Verilog, SystemVerilog, VCS, Verdi, Xcelium, Python, Perl
4w
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Senior Optical Design Engineer
Newington, New Hampshire, United States
OnsiteFull Time
8+ YOEMaster's in Optical/Electrical Engineering or Physics, 8+ years optical systems experience, expertise in fiber optics and optical test methods, modeling and prototyping, EDFAs, verification and reliability testing, strong communication and leadership.
LabWindows/CVI
2w
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Mechatronics Test Engineer, Hardware Verification and Validation
North Reading, Massachusetts, United States
$137k-$186k/yr OnsiteFull Time
Develop and execute test programs and verification plans for robotic hardware, design and operate test benches, analyze test data, and produce test reports.
1d
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Senior Design Quality Engineer- Medical Devices
Burlington or Andover
$69k-$150k/yr HybridFull Time
10+ YOEBachelor's degree and 10+ years of software quality assurance experience in regulated environments. Requires medical device, embedded development, design controls, SDLC, risk management, verification, validation, and FDA regulatory expertise.
Software Development Life Cycle (SDLC), IEC 62304, FMEA, CAPA, FDA, ISO, 21 CFR 820, 21 CFR 812, 21 CFR 814
4w
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Digital Engineer V
Huntsville or Exeter or Plainview or Hauppauge or Colorado Springs or Colorado
$150k-$200k/yr OnsiteFull Time
10+ YOEBachelor's in Electrical or Computer Engineering, minimum 10 years experience in digital hardware design, expertise in FPGA and high-speed interfaces, signal/power integrity, schematic capture, and hardware verification.
Siemens DXDesigner, Altium Designer, Hyperlynx SI/PI
2mo
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Principal Systems Engineer
Merrimack, New Hampshire, United States
OnsiteFull Time
7+ YOERequires systems engineering experience including requirements management (DOORS), system-level design, modeling & simulation, verification/validation, test planning, cost estimating, and mentoring; Master\u0002s+7yrs or Bachelor\u0002s+9yrs and eligible for security clearance.
DOORS, Microsoft Office, Microsoft Excel, Microsoft Projects, MATLAB, Visio, CAMEO Enterprise Architecture
1w
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ASIC/FPGA Methodology Engineer (TERADYNE, North Reading, MA)
North Reading, Massachusetts, United States
$155k-$248k/yr OnsiteFull Time
3+ YOEBachelor's or master's degree in electrical or computer engineering, 3+ years of FPGA and embedded design experience, and proficiency with design, verification, CI/CD, and Linux tools.
Verilog, Vivado, Quartus, Jenkins, Docker, Git, Linux, LSF, ClearCase, Artifactory, SystemVerilog, UVM
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Application Engineer
San Jose or Austin or Cary or Columbia or Burlington
$74k-$138k/yr OnsiteFull Time
0+ YOEBachelor's degree in STEM required; entry-level new grad role with experience using EDA tools; familiarity with UNIX, C/C++, Perl, TCL, Python; fundamentals in design, verification, HDLs, synthesis, and timing.
Electronic design automation (EDA) tools, HDLs, UNIX, C/C++, Perl, TCL, Python
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Application Engineer
San Jose or Cary or Austin or Burlington or Columbia
$74k-$138k/yr OnsiteFull Time
Bachelor's degree in STEM required; entry-level cohort program for new graduates. Familiarity with EDA tools, fundamentals of design/verification, UNIX, C/C++, Perl, TCL, Python; strong communication and problem-solving skills.
Electronic Design Automation (EDA), UNIX, C/C++, Perl, TCL, Python, Hardware Description Languages (HDLs)
3mo
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Staff Electrical Engineer (Nashua, NH, US)
Nashua, New Hampshire, United States
$114k-$220k/yr OnsiteFull Time
8+ YOE8+ years analog/mixed-signal IC design experience; master’s degree; CMOS/analog design expertise; layout, verification, and tape-out involvement; strong modeling and simulation skills.
UNIX, MATLAB, Circuit simulation, DRC, LVS, Layout tools
1mo
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Principal Software Applications Engineer Onsite in Burlington MA
Burlington, Massachusetts, United States
$158k-$197k/yr OnsiteFull Time
Knowledge of FDA, ISO, and GMP; experience with risk assessments, validation/verification, troubleshooting manufacturing issues, and design transfer documentation.
1mo
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Lead Systems and RF System Engineer
Woburn or Boston or Arlington or Dayton or Melbourne or Carlsbad or Atlanta
$160k-$220k/yr OnsiteFull Time
10+ YOEBS in EE/Applied Math/Physics,10+ years RF systems experience, ability to obtain U.S. security clearance, RF design, integration, test, requirements and verification experience.
MATLAB, Python, ANSYS HFSS, Sonnet, C/C++
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