37 design verification engineer jobs at 9 companies in Salem, OR

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Senior Design Verification Engineer
Mountain View or Redmond or Hillsboro
$120k-$235k/yr HybridFull Time
Microsoft
MicrosoftNASDAQ: MSFT: Develops software, services, devices, and cloud computing solutions.
Experience creating verification environments, pre-/post-silicon validation, strong knowledge of verification methodologies and languages, and ability to pass security/export screenings.
Verilog, VHDL, System Verilog, UVM, C/C++, Python, Ruby, Perl, Makefiles, FPGA
2mo
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SoC Physical Design Verification Engineer
Beaverton, Oregon, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Experience with physical verification of system-on-chip (SoC) designs and contributing to the design and manufacture of high-performance, power-efficient processors.
3mo
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Senior Engineer Design Verification Engineering
Beaverton, Oregon, United States
$119k-$163k/yr HybridFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
2+ YOEMaster's in CS/CE/EE or related field with 2 years in design verification; or Bachelor's with 4 years, plus strong scripting and verification experience.
SystemVerilog, UVM, Cadence Xcelium, Synopsys VCS, Perl, Python, scripting
1mo
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Mixed Signal Design Verification Engineer
Hillsboro, Oregon, United States
$142k-$200k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
2+ YOEBachelor's in EE/CE/CS with 3+ years or Master's with 2+ years; digital logic and VHDL/Verilog/System Verilog experience; testbench development (OVM/UVM); strong debug skills.
VHDL, Verilog, System Verilog, OVM, UVM
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Design Verifciation Principal Engineer
Hillsboro, Oregon, United States
$127k-$237k/yr HybridFull Time
Rambus
RambusNASDAQ: RMBS: Develops high-performance memory interface chips and semiconductor IP.
10+ YOEBachelor's in EE/CS, 10+ years in design verification, SystemVerilog/Verilog RTL fluency, HDL testbench experience, DDR familiarity preferred; Python and TCL scripting experience preferred.
System Verilog, Verilog, Python, TCL
2w
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Analog ASIC Design Engineer
Boulder or Louisville or Beaverton
HybridFull Time
Ralliant
RalliantNew York Stock Exchange: RAL: Sells precision instruments and sensors for diverse industrial sectors.
5+ YOEBSEE or MSEE in EE, 5+ years analog/mixed‑signal IC design experience, ASIC design and verification tool proficiency, RF and layout experience, lab characterization, strong communication and collaboration skills.
Ansys HFSS, Cadence EMX
2mo
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Senior Applications Engineer - Emulation
Austin or San Diego or Costa Mesa or Wilsonville
$167k-$334k/yr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
5+ YOE5+ years in design/verification/emulation and prototyping of electronics chips and systems; BS or MS in EE, CE, CS or related fields.
Emulation platforms (Veloce, Palladium, Zebu), SystemVerilog, Verilog, VHDL, SystemC, C, C++, Perl, Python, XML, JSON
1mo
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Senior Electrical Engineer
Fremont or Salem or Pittsburgh
$174k-$226k/yr HybridFull Time
Agility Robotics
Agility Robotics: Develops bipedal humanoid robots for industrial warehouse automation.
7+ YOEBachelor's degree in EE (Master's preferred), 7+ years electrical design experience, Altium expertise, PCB design and verification, embedded controls, high-speed signaling, power electronics, prototyping, and strong collaboration skills. U.S. work authorization required.
Altium, Jira
2w
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Project Manager
Austin or Hillsboro or Boise
$115k-$140k/yr HybridFull Time
SSOE Group
SSOE Group: Provides architecture, engineering, and construction management for industrial facilities.
Project manager for design-build advanced technology projects; bachelor's in engineering preferred; PMP desired; experience with Deltek Vantagepoint, Microsoft Project or Primavera P6; ability to perform field verifications and lead cross-cultural teams.
Deltek Vantagepoint, Microsoft Project, Primavera P6, vibe-coding platforms, AI Large Language Models