62 design verification engineer jobs at 12 companies in Gresham, OR

3mo
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Design Verification Engineer
Beaverton, Oregon, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
3+ YOEBS with 3+ years in design verification; SystemVerilog, digital simulation, CPU architecture; Python/Perl programming; UVM experience preferred.
SystemVerilog, UVM, Python, Perl, C/C++, Debugging tools
3d
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Design Verification Engineer
Raleigh or Hillsboro or Austin or Mountain View or Redmond
$102k-$202k/yr HybridFull Time, Contract
Microsoft
MicrosoftNASDAQ: MSFT: Develops software, services, devices, and cloud computing solutions.
1+ YOEMaster's+1 or Bachelor's+2 years technical engineering experience (or equivalent); verification of silicon/IP using UVM/System Verilog/Formal; Python scripting; knowledge of CHI/AMBA/PCIe/CXL preferred; pass Microsoft Cloud Background Check and export-control screening.
UVM, Formal, System Verilog, Python
3w
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IP Design Verification Engineer
Santa Clara or Hillsboro
$142k-$200k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
2+ YOEBachelor's in ECE/CS +5 yrs, Master's +3 yrs, or PhD +2 yrs; experience with System Verilog/UVM, RTL/Verilog, SVA, constrained-random verification, coverage analysis; mixed-signal and UCIe/PCIe experience preferred.
System Verilog, UVM, Register Transfer Level (RTL), Verilog, System Verilog Assertions (SVA), UCIe, PCIe
2mo
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Senior Engineer Design Verification Engineering
Beaverton, Oregon, United States
$119k-$163k/yr HybridFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
2+ YOEMaster's in CS/CE/EE or related field with 2 years in design verification; or Bachelor's with 4 years, plus strong scripting and verification experience.
SystemVerilog, UVM, Cadence Xcelium, Synopsys VCS, Perl, Python, scripting
2mo
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Senior Design Verification Engineer - Memory Controller IP
Hillsboro, Oregon, United States
$108k-$201k/yr HybridFull Time
Rambus
RambusNASDAQ: RMBS: Develops high-performance memory interface chips and semiconductor IP.
7+ YOEBachelor's in EE/CS, minimum 7 years HDL design-verification experience; System Verilog/Verilog fluency; testbench, functional coverage, regression and verification scripting; Python and TCL preferred; DDR/HBM/GDDR familiarity preferred.
System Verilog, Verilog, Python, TCL
1mo
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Senior CPU Design Verification Engineer, Emulation
Austin or Mountain View or Portland or Poughkeepsie
$163k-$237k/yr OnsiteFull Time
Google
GoogleNASDAQ: GOOGL: Provides online search, advertising, cloud computing, and consumer electronics.
8+ YOE8+ years in design verification (UVM/SystemVerilog) and hardware emulation; reproducing post-silicon failures; experience with Synopsys Verdi/Cadence SimVision and scripting (Python, TCL, Bash).
UVM, SystemVerilog, Synopsys Verdi, Cadence SimVision, Python, TCL, Bash, JTAG
1w
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Integrated Circuit Design Verification Engineer
Vancouver, Washington, United States
$173k-$259k/yr OnsiteFull Time
Snap
SnapNYSE: SNAP: Provides visual messaging software and augmented reality wearable devices.
10+ YOE10+ years ASIC design verification experience; strong UVM/SystemVerilog skills; Siemens Questa; develop UVM/assertion testbenches, functional and code coverage, scripting/automation in Linux.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
4d
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CPU Design Methodology Engineer
Hillsboro or Austin or Santa Clara or Arizona
$136k-$265k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEMasters in Computer or Electrical Engineering or equivalent,5+ years chip/SOC design experience,RTL/verification and design automation expertise,proficient in scripting (Perl/Python),strong analytical and interpersonal skills.
Verilog, UVM, System Verilog, Perl, Python
2d
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MTS Logic Design
Hillsboro, Oregon, United States
$86k-$160k/yr HybridFull Time
Rambus
RambusNASDAQ: RMBS: Designs and licenses high-performance semiconductor memory interface technologies.
Bachelor's degree in engineering, knowledge of Verilog/System Verilog, RTL design and verification, strong communication skills.
Verilog, System Verilog, RTL
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Senior Applications Engineer - Emulation
Austin or San Diego or Costa Mesa or Wilsonville
$167k-$334k/yr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
5+ YOE5+ years in design/verification/emulation and prototyping of electronics chips and systems; BS or MS in EE, CE, CS or related fields.
Emulation platforms (Veloce, Palladium, Zebu), SystemVerilog, Verilog, VHDL, SystemC, C, C++, Perl, Python, XML, JSON
1mo
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Product Test Engineer
Hillsboro, Oregon, United States
OnsiteFull Time
Lattice Semiconductor
Lattice SemiconductorNASDAQ: LSCC: Designs and manufactures programmable logic devices (FPGAs).
Develop test plans; design test circuits; automate test generation; perform Pre-Si and Post-Si verification across conditions.
FPGA, ATE, test automation tooling, embedded IP software
2w
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Senior Electrical Engineer
Fremont or Salem or Pittsburgh
$174k-$226k/yr HybridFull Time
Agility Robotics
Agility Robotics: Develops bipedal humanoid robots for industrial warehouse automation.
7+ YOEBachelor's degree in EE (Master's preferred), 7+ years electrical design experience, Altium expertise, PCB design and verification, embedded controls, high-speed signaling, power electronics, prototyping, and strong collaboration skills. U.S. work authorization required.
Altium, Jira
3w
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Principal Engineer - Memory-Centric AI Compute Architect
Hillsboro, Oregon, United States
$192k-$288k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
6+ YOEMaster's/PhD preferred; 6+ years (PhD) / 7+ years (Master's) / 8+ years (Bachelor's) ASIC design/verification/validation/integration experience; knowledge of memory and compute architectures, AI models, and performance modeling; proficiency in C/C++/Python/Perl.
Phyton, C, C++, Perl, Python, HBM, DRAM