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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
1mo
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FPGA Design Engineer
Huntsville, Alabama, United States
OnsiteFull Time
2+ YOETwo+ years' experience in FPGA/embedded design for SDR; knowledge of RF, analog/digital electronics; U.S. citizenship with active Secret or higher clearance.
FPGA, LabVIEW, Digital Electronics, Analog Electronics, RF Test Equipment, SRIO, RF Signal Processing
2mo
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Sr. FPGA Design Engineer
Seattle or United States
$215k-$300k/yr HybridFull Time
8+ YOEBachelor’s in Electrical or Computer Engineering; 8+ years hardware development; FPGA design, verification, and synthesis experience.
Verilog, VHDL, ModelSim, Vivado, Quartus
1w
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FPGA Design Engineer III
Austin, Texas, United States
OnsiteFull Time
3+ YOE3+ years Verilog RTL FPGA design experience, Bachelor's degree in EE/CE, full FPGA design flow knowledge, proficiency with major FPGA tool suites, and experience with verification and timing closure.
Verilog, VHDL, SystemVerilog, Microchip PolarFire SoC, RISC-V, PCIe, Ethernet, SERDES, UVM, Libero SoC, Xilinx Vivado, Intel Quartus, logic analyzers, oscilloscopes, Linux
1w
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FPGA Design Engineer
Huntsville, Alabama, United States
OnsiteFull Time
3+ YOEBachelor's in Engineering, 3+ years experience, strong FPGA design in VHDL/Verilog, DSP and digital filter/DDS experience, PCIe/DDR/Multi-gigabit/Ethernet experience, mixed-signal PCB and RFSoC preferred, U.S. citizenship with active Secret clearance.
VHDL, Verilog, HDL, Xilinx RFSoC, PCIe, DDR Ram, Ethernet, UART, I2C, SPI, 8B10B, Oscilloscope, Function Generator, Logic Analyzer, Spectrum Analyzer, Network Analyzer
2mo
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Senior FPGA Design Engineer
McKinney, Texas, United States
$87k-$165k/yr OnsiteFull Time
5+ YOESTEM degree with 5+ years FPGA design experience; VHDL/Verilog proficiency; experience with Xilinx/Altera/Microchip FPGAs; onsite in McKinney, TX; DoD Secret security clearance.
VHDL, Verilog, Xilinx FPGAs, Altera FPGAs, Microchip FPGAs, Python, Perl, C
1mo
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Sr. FPGA Design Engineer
Milpitas, California, United States
$141k-$240k/yr OnsiteFull Time
3+ YOEExperience designing complex FPGA firmware; proficient with Xilinx/Intel FPGAs; HDL Verilog/SystemVerilog; FPGA tools (Vivado, VCS/Modelsim); timing analysis; knowledge of PCIe, DDR4, 10G, SPI, I2C; collaboration with hardware and software teams.
VCS, Modelsim, Vivado, Verilog, SystemVerilog, PCIe, Aurora, DDR4, 10G, SPI, I2C, embedded Linux
2mo
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FPGA Design Engineer
Nashua or Manchester or New Hampshire or United States
$97k-$165k/yr OnsiteFull Time
4+ YOEEligible for Secret clearance; typically a Bachelor's + 4+ years (or equivalent). FPGA/ASIC design experience with VHDL/Verilog, testbench development, timing closure, revision control, lab testing, and strong communication/problem-solving skills.
VHDL, Verilog HDL, SystemVerilog, UVM, GIT, CVS, Clearcase, Subversion, Xilinx Vivado, Intel/Altera Quartus, ModelSim, QuestaSim, MATLAB/Simulink, Perl, Tcl, Python, shell, C/C++, ILA, ChipScope, SignalTap
3mo
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FPGA Design Engineer - Avionics
Saratoga, California, United States
$150k-$250k/yr OnsiteFull Time
5+ YOE5+ years FPGA design experience; SystemVerilog/VHDL; AXI interfaces; timing closure; radiation-tolerant design knowledge.
SystemVerilog, VHDL, AXI, SPI, I2C, GPIO, Python, TCL, Shell scripting, Makefiles, VCS, QuestaSim
3mo
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FPGA Design Engineer
Rolling Meadows, Illinois, United States
$96k-$145k/yr OnsiteFull Time
2+ YOEBS in STEM with 2+ years digital electronics design (or MS), FPGA/circuit card prototyping and debug, digital simulation and test, familiarity with DOORS/ClearCase/ClearQuest, ability to lead small projects, U.S. citizenship and active Secret clearance.
Xilinx, Altera, Actel, DOORS, ClearCase, ClearQuest, Cadence Concept, Allegro, Mentor DxDesigner, Expedition
1mo
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Principal FPGA/Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$179k/yr OnsiteFull Time
5+ YOEU.S. citizenship and active government clearance required; bachelor’s in EE/CE or equivalent experience; 5+ years digital electronics/FPGA design experience (8+ for Sr. Principal); experience with digital prototyping, simulation, and documentation tools.
FPGA, Xilinx, Altera, Actel, DOORS, ClearCase, ClearQuest, Cadence Concept, Allegro, Mentor DxDesigner, Expedition
4w
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FPGA Design Engineer
Tucson, Arizona, United States
OnsiteFull Time
8+ YOEB.S. in EE/CE, 8+ years FPGA design experience with VHDL, AMD/Xilinx/Vivado, RTL-to-hardware lifecycle, lab debugging, Git, ModelSim/QuestaSim, and scripting (Python/Perl/Ruby). U.S. work authorization required; clearance may be needed.
VHDL, AMD/Xilinx, Vivado, Git, ModelSim, QuestaSim, Python, Perl, Ruby, oscilloscope, spectrum analyzer, signal source, power supply
2mo
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Staff FPGA Design Engineer
Owego, New York, United States
$124k-$218k/yr OnsiteFull Time
5+ YOEUS citizen with Secret clearance eligibility; FPGA architecture and design experience with Intel/Xilinx/Microchip devices; proficiency in SystemVerilog/Verilog/VHDL, MATLAB or Python, and FPGA toolchains; bachelor's degree (or equivalent) with relevant experience.
MATLAB, MATLAB Coder, Python, SystemVerilog, Verilog, VHDL, C, C++, Intel Quartus, Xilinx Vivado, Microchip Libero, Mentor Questa, UVM, Jira, Confluence
2w
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Staff FPGA Design Engineer
Berthoud, Colorado, United States
$150k-$180k/yr OnsiteFull Time
10+ YOEB.S. in Electrical Engineering with 10+ years in electronics hardware and ASIC/FPGA development for flight avionics; experience with mixed-signal design, VHDL/Verilog/SystemVerilog, timing closure, EMI/EMC, and hardware verification.
VHDL, Verilog, SystemVerilog, Python, TCL, Xilinx, Microsemi, MATLAB, Simulink, SPICE, Altium, SystemVerilog UVM, C, C++, assembly language, Linux/Windows shell scripting, Cocotb
2w
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FPGA Design Engineer
Long Beach, California, United States
$135k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA development with AMD/Xilinx platforms,expertise with Vivado/Vitis and HDL,experience with PCIe/Ethernet/SerDes,hardware/software integration and production bring-up.
Xilinx Vivado, Vitis, Vivado ILA, VIO, Git, Python, TCL, ModelSim, Vivado Simulator, PetaLinux
2w
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FPGA Design & Validation Engineer
Houston, Texas, United States
$60k-$100k/yr OnsiteFull Time
3+ YOEExpertise in VHDL, FPGA development and validation, lab hardware-in-the-loop testing, timing/post-synthesis verification, ADC/DAC interfacing, and 3+ years FPGA experience; B.E./M.Tech in relevant field.
VHDL, Verilog, Xilinx Vivado, Intel Quartus, Microchip Libero, Lattice FPGA, XPE, Oscilloscope, SignalTap, Logic Analyzer
3w
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FPGA Design Engineer
New York City, New York, United States
$200k-$280k/yr OnsiteFull Time
Proven FPGA experience bringing RTL to timing-closed hardware; expert SystemVerilog/VHDL and Xilinx Vivado; PCIe and common bus protocols; strong Python/C++ for automation; board bring-up and lab debugging skills.
SystemVerilog, VHDL, Xilinx Vivado, ILA, Vivado Analyzer, Python, C++, PCIe, AXI, AHB, SPI, UART, JTAG, HAPS, VCU118, VPK180, Cocotb, UVM, OSVVM, hls4ml, FINN, GitLab CI, Docker, oscilloscope, logic analyzer
1w
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FPGA Design Engineer
Cedar Rapids, Iowa, United States
$80-$90/hr RemoteContract, Temporary
5+ YOEBachelor's in EE/CE/CS,5+ years FPGA VHDL experience in safety-critical aerospace/defense,DO-254 experience,RTL simulation/synthesis/place-and-route/timing closure skills,US citizen/PR required.
VHDL, C++, VxWorks, Atlassian Suite, Jama, Coverity, Rapita, ARINC-653, ARINC-429, MIL-STD-1553, AFDX, CAN, SPI, UART
2w
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FPGA Design Engineer - Pittsburgh, PA
Pittsburgh, Pennsylvania, United States
OnsiteFull Time
US citizen with engineering or science degree, eligibility for security clearance, experience with FPGA design, familiarity with high-speed interfaces, and ability to travel up to 25%.
C, C++, Python, Javascript, VDHL, git, svn, Bash, Unix, Ethernet, AXI4, Avalon, PCIe, SDI
3mo
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Staff, FPGA Digital Design Engineer
Germantown, Maryland, United States
$113k-$209k/yr OnsiteFull Time
8+ YOEBS or MS in Electrical/Computer Engineering; 8+ years FPGA design; Verilog/SystemVerilog or VHDL; Ethernet/IP; experience with AMD/Altera devices; optical interfaces; PCIe; HDL tools.
Verilog, SystemVerilog, VHDL, FPGA, Questa, Aldec Riviera, Git, PCIe, Ethernet, VLAN, MPLS, VoIP, IP
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