124 fpga engineer jobs at 38 companies in Newman, CA
6d
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Lead FPGA Engineer
Milpitas, California, United States
$118k-$200k/yr OnsiteFull Time
0+ YOEDegree in engineering or related field plus 0–5 years of related experience depending on degree; FPGA RTL, high-speed digital design, SystemVerilog, Verilog, VHDL, firmware integration, debugging, and system testing experience.
FPGA, SystemVerilog, Verilog, VHDL, Xilinx Vivado, Xilinx ISE, Synplify, Questa, ModelSim, Python, MATLAB, OrCAD, PCIe, DDR, 10G SerDes, PCB
3w
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FPGA Engineer: Physical AI & Robotics
San Jose or Austin
HybridFull Time
Experienced FPGA/Adaptive SoC engineer with FPGA RTL and embedded software skills, familiarity with Verilog/SystemVerilog/VHDL, C/C++, Embedded Linux/Yocto, hardware debugging, and ability to work with customers on Physical AI solutions.
AMD Vivado, Vitis, Vitis HLS, Yocto, Verilog, SystemVerilog, VHDL, C, C++, PCIe, Ethernet, DisplayPort, MIPI CSI/DSI, USB, CAN, SPI, I2C, UART, GPIO, ROS 2, Git, JTAG, oscilloscope, protocol analyzer, logic analyzer
3mo
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FPGA Engineer (CA, San Jose)
San Jose, California, United States
HybridFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience in FPGA design and verification, proficiency in RTL/C/C++, Python; familiarity with VHDL/Verilog, hardware security, IP core development, and FPGA tools.
C, C++, Python, VHDL, Verilog, Tcl, Vivado, GHDL, Questa, Quartus Prime, Xilinx, Altera, Versal, Stratix, Avalon, AXI, ACE, IP cores, cocotb, pyuvm
2mo
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Senior FPGA Design Engineer
San Jose, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEStrong RTL FPGA design experience with Vivado and Protocompiler; FPGA/IP integration; 5+ years; PCIe/USB/Ethernet; BS/MS in EE/EECS/CS; English.
Vivado, Protocompiler, IP Integration, PCIe, USB, Ethernet, SPI
1mo
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FPGA Compiler (Placer) Engineer
San Jose, California, United States
$149k-$216k/yr OnsiteFull Time
6+ YOEBachelor's degree in EE/CE/CS, 6+ years in FPGA/ASIC CAD or EDA, strong algorithms and data structures, placement and physical design experience, proficiency in C/C++ and scripting (Python, Tcl).
C/C++, Quartus, Vivado, Python, Tcl
2mo
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FPGA Engineer Engineer (eInfochips)
San Jose or Austin
OnsiteFull Time
9+ YOE9+ years experience; proficient in Verilog/System Verilog, EDA tools (VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus), IPXACT, UPF, PCIe/AXI/APB, ARM fabric; scripting with Python/Tcl/Perl; timing signoff and clock-crossing expertise.
Verilog, System Verilog, Python, Tcl, Perl, VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus, IPXACT, UPF
1mo
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Senior FPGA Design Engineer,( Nextest, San Jose, CA)
San Jose, California, United States
$170k-$273k/yr OnsiteFull Time
8+ YOEB.S. or M.S. in Electrical Engineering, 8+ years relevant experience, RTL/Verilog, FPGA transceiver and timing experience, C/C++, EM/FPGA tool flow familiarity, lab equipment experience.
C, C++, Linux, Windows, Verilog HDL, Intel FPGA tool flows, Xilinx FPGA tool flows, UVM, ATE
1mo
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Hardware Engineer - FPGA
Milpitas or San Francisco
$152k-$222k/yr OnsiteFull Time
7+ YOEExperienced FPGA/ASIC engineer with RTL (Verilog/SystemVerilog) skills, FPGA tool experience, 7+ years (BS) or 4+ years (MS), verification experience (UVM/VMM) preferred.
Verilog, SystemVerilog, UVM, VMM
5d
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Technical Staff Engineer - Design (FPGA Fabric)
San Jose or Chandler
$91k-$232k/yr OnsiteFull Time
12+ YOEBachelor's degree and 12+ years in custom FPGA fabric or memory circuit design. Requires SPICE, EDA, scripting, Verilog, simulation, yield, reliability, power, and cross-functional design expertise.
SPICE, Verilog, Solido, Monte Carlo
4w
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Sr Staff Engineer Instrument Architecture
Milpitas, California, United States
$169k-$270k/yr HybridFull Time
12+ YOEBachelor’s in engineering,12+ years systems engineering experience, expertise in real-time control, data pipeline and FPGA processing, optics and fluidics knowledge, regulated design control experience.
RTOS, FPGA, DMA, PCIe, USB 3.0, Gigabit Ethernet, RS232, USB, TCP/IP, CAN bus, SPI, I2C
3mo
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Senior Hardware Engineer
Milpitas, California, United States
HybridFull Time
5+ YOEBS/MS in Electrical Engineering; 5+ years PCB/hardware bring-up; RF/MIMO and high-speed analog/digital experience; S-parameters, VNA; JESD204B; test automation; FPGA/MCU integration.
VNA, Oscilloscope, Spectrum Analyzer, Signal Generator, JESD204B, JESD204C, S-Parameters, RF PCB Design, Python, FPGA, MCU, EDA Tools
2mo
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Senior Engineer, RTL Design
San Jose, California, United States
$138k-$206k/yr OnsiteFull Time
5+ YOEBS with 5 years RTL development or MS with 3 years; PhD in Computer/Electrical Engineering; HDL/Verilog; FPGA; PCIe/CXL/NVMe; CAD tools.
Verilog, HDL, CAD tools, Synopsys, Mentor, Cadence, FPGA, PCIe, CXL, NVMe, AXI, DDR4/5, Ethernet
1mo
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Engineer, SIG Electrical Design
San Jose, California, United States
$151k-$191k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering or related with 2+ years experience. Experience with PCB design, FPGA/PCIe/DDR interfaces, analog and power design, HyperLynx simulations, lab debugging tools, SSD test equipment, DFM/DFT support.
HyperLynx, FPGA, PCIe, DDR, PCB, Oscilloscope, Digital Multimeter, Logic Analyzer, Power Supply, Probes
1mo
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Engineer, SIG Electrical Design
San Jose, California, United States
$151k-$191k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering (or related) and 2 years experience; PCB, digital (FPGA), analog and power supply design; signal/power integrity analysis (HyperLynx); PCIe/DDR expertise; lab debugging and SSD test equipment experience.
HyperLynx, FPGAs, PCIe, DDR, Oscilloscopes, Digital multi-meters, Power supplies, Probes, Logic analyzers, SSD test equipment
1mo
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Staff Application Engineer
San Jose, California, United States
$145k-$180k/yr HybridFull Time
5+ YOEBSEE (MSEE preferred). 5+ years in analog/digital/mixed-signal and power electronics, configurable devices (GreenPAK/FPGA/Verilog), IC prototyping and bench-debug skills, strong technical communication.
GreenPAK, FPGA, Verilog
2mo
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Hardware Engineer (Space)
Tempe or San Jose or San Francisco or New York City
$133k-$210k/yr OnsiteFull Time
6+ YOEBachelor's in Electrical Engineering,6+ years hardware engineering experience in high-speed digital board design,FPGA/SoC integration,HyperLynx and schematic tools experience,space hardware qualification experience,US citizenship,ability to travel up to 10%.
Mentor Xpedition, Cadence, HyperLynx, GitHub
2mo
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Sr. Hardware Engineer, Networking Swtich (San Jose, California, United States)
San Jose, California, United States
$155k-$175k/yr OnsiteFull Time
8+ YOEBachelor's in EE or related, 8+ years hardware design for networking/server/HPC; PCB schematic/layout, SI/PI, thermal co-design, hardware bring-up, validation, ASIC/FPGA/CPLD experience, CPO/optics, Linux familiarity.
Oscilloscope, Logic Analyzer, Protocol Analyzer, Linux, Verilog, ASIC, FPGA, CPLD
1w
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Hardware Engineer
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$91k-$113k/yr OnsiteFull Time
Early-career candidates pursuing or recently completing an engineering degree; familiarity with hardware, firmware, ASIC/SoC, or systems; programming and design experience through coursework or projects; strong analytical and communication skills.
Verilog/SystemVerilog, RTL, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, Git, Linux, IDE, CAD, Microsoft Office, RTOS
1mo
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Principal Engineer Synthesis Team
San Jose, California, United States
$248k/yr OnsiteFull Time
10+ YOE10+ years EDA development experience with focus on logic synthesis or place-and-route, expert C++, synthesis algorithms, FPGA architecture knowledge, QoR benchmarking, and technical leadership.
C++, Python, Radiant, Propel, ACE, generative AI tools
1mo
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Technical Staff Engineer - Digital Design
San Jose, California, United States
$70k-$143k/yr HybridFull Time
12+ YOEBachelor's in EE/CE, 12+ years relevant experience (10+ in FPGA/ASIC IP and system design), VHDL/Verilog expertise, FPGA design/verification experience, strong digital design and architecture knowledge, excellent communication; US citizenship or permanent residency required.
VHDL, Verilog, Libero, Quartus, Vivado, Identify Debugger, SignalTap, ChipScope, ModelSim, QuestaSim, Python, TCL
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