75 fpga engineer jobs at 32 companies in Wildomar, CA
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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
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Experienced FPGA Developer
Rancho Santa Margarita, California, United States
$55/hr OnsiteContract
7+ YOEBachelor's degree in engineering,7+ years VHDL FPGA design experience, proficiency with Vivado/ModelSim and MicroSemi architecture, experience with I2C/SPI/PCIe and hardware test equipment,US citizenship required,ability to work onsite in Rancho Santa Margarita, CA.
VHDL, Verilog, SystemVerilog, Vivado, ModelSim, MicroSemi, I2C, SPI, PCIe, oscilloscope, spectrum analyzer, logic analyzer, power meter
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Staff FPGA Engineer, EW
Costa Mesa, California, United States
$220k-$292k/yr OnsiteFull Time
Design and verify FPGA/DSP modules on AMD/Xilinx SoC/FPGA platforms; experience with HDL (VHDL/Verilog), high-speed digital interfaces (PCIe, JESD, Aurora), Linux development, Git and CI/CD; eligible for U.S. Secret clearance; mentoring experience.
AMD, Xilinx, VHDL, Verilog, Linux, Git, TCL, CI/HITL, PCIE, JESD, Aurora, AMD AIE
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
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Principal FPGA / RTL Design Engineer - Signal Processing
Los Angeles or Irvine
$175k-$225k/yr HybridFull Time
10+ YOEBS in ECE/CS or related; 10+ yrs RTL/FPGA design or 6+ yrs with PhD; Xilinx FPGAs, Vivado; fixed-point DSP; US person.
Xilinx FPGAs, Vivado IDE, Fixed-point arithmetic, Digital Signal Processing, MATLAB, Python, Perl
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Associate ASIC/FPGA Design or Verification Engineer
El Segundo or Huntington Beach or Fairfax
$99k-$133k/yr OnsiteFull Time
2+ YOEUS citizenship with ability to obtain U.S. Secret clearance, Bachelor\u0000s degree in a relevant field, experience with ASIC/FPGA design or verification, and RTL experience with Verilog/VHDL/SystemVerilog.
Verilog, VHDL, SystemVerilog, System Verilog Assertions, UVM, Palladium, Make, Perl, Python, svn, cvs, git, Linux, ARM, JESD204C, PCIe, Ethernet
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
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Associate ASIC/FPGA Design or Verification Engineer
El Segundo or Huntington Beach or Fairfax
$99k-$133k/yr OnsiteFull Time
2+ YOEUS citizenship and ability to obtain U.S. Secret clearance; BS in engineering or related field; experience with ASIC/FPGA design or verification and HDL (Verilog/VHDL/System Verilog); familiarity with verification methodologies and scripting.
Verilog, VHDL, System Verilog, System Verilog Assertions, UVM, Palladium, Make, Perl, Python, svn, cvs, git, Linux, JESD204C, PCIe, Ethernet
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FPGA/ASIC Design Engineer (Silicon Engineering)
Irvine or Redmond
$125k-$145k/yr OnsiteFull Time
1+ YOEBachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
Verilog/SystemVerilog, VHDL, Python, C/C++, Bash, HDL simulators, Spyglass, Vivado, Quartus, AXI/APB/AHB protocols
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Senior ASIC/FPGA Verification Engineer (Onsite)
El Segundo or Fullerton
$96k-$182k/yr OnsiteFull Time
5+ YOEActive transferable U.S. SECRET clearance and U.S. citizenship, STEM degree (BS or advanced) with 5+ years (BS) or 3+ years (advanced) experience, RTL verification using VHDL/Verilog/SystemVerilog, testbench and coverage, and revision control (Git/Subversion).
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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Electrical Engineer II
Garden Grove, California, United States
$120k-$150k/yr OnsiteFull Time
2+ YOEBachelor's degree in electrical, electronics, or computer engineering plus 2 years' experience; requires component engineering, electronic product design, embedded systems, FPGA, schematic capture, debugging, technical writing, and U.S. citizenship.
FPGA, Altium, SiliconExpert, Z2Data, Ethernet, NTP, PTP, PTTI, BOM, MTBF, FMECA
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Hardware Engineer
Vista, California, United States
$190k-$225k/yr OnsiteFull Time
15+ YOE15+ years in hardware design and fiber-optic communication, BS in Electrical Engineering required (MS/PhD preferred), hands-on prototyping, test and measurement, PCB/SMT experience, firmware/FPGA familiarity, and technical leadership.
FPGA, PCB, SMT, database systems, AI
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Hardware Engineer
Vista, California, United States
$190k-$225k/yr OnsiteFull Time
15+ YOE15+ years hardware design and fiber-optic communications experience; BS in Electrical Engineering required (MS/PhD preferred); expertise in high-speed electronics, optical signal integrity, PCB fabrication, testing, firmware/FPGA, coding, and technical leadership. Eligible to work in the US.
FPGA
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Hardware Engineer III
Irvine, California, United States
$120k-$140k/yr OnsiteFull Time
3+ YOEBachelor's in Electrical Engineering, 3–7 years hardware design experience with processors/FPGAs, DDR and high-speed interfaces, PCB/schematic tools (Orcad Capture, PADS Layout), lab equipment experience, and C/C++ or Python proficiency.
Orcad Capture, PADS Layout, C/C++, Python, Linux, Xilinx, Intel FPGA, Oscilloscope, Spectrum Analyzer, Logic Analyzer, Power Analyzer
1d
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Hardware Leaning Project Engineer (42465)
Carlsbad, California, United States
$153k-$284k/yr OnsiteFull Time
12+ YOEBachelor's degree with 12 years' related experience, graduate degree with 10 years, or 14 years without a degree; active Secret clearance; hardware engineering, PCB, FPGA, communications, and technical leadership experience.
PCB, FPGA
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Hardware Engineer
Vista, California, United States
$190k-$225k/yr OnsiteFull Time
15+ YOE15+ years hardware and fiber-optic communication experience; BS in Electrical Engineering required (MS/PhD preferred); experience with high-speed electronics, RF/PI/SI, PCB fabrication, test & measurement, firmware/FPGA, prototyping, and leading small technical teams; must be eligible to work in the US without restrictions.
FPGA, AI, PAM4, NRZ
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Architecture and System Design Engineer
Irvine, California, United States
$124k-$165k/yr OnsiteFull Time
Master's or PhD in electrical engineering, advanced electronics architecture and system design expertise, circuit and PCB design, signal integrity/EMC, C/C++/Python, FPGA, CAD tools, leadership and mentoring experience.
C, C++, Python, FPGA, CAD tools
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Programmable Logic (PL) Engineer
Carlsbad, California, United States
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in EE/Computer Engineering,5+ years FPGA design experience,Verilog/VHDL expertise,experience with FPGA EDA tools,US citizenship and active Secret clearance,ability to travel up to 10%.
AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, Verilog, VHDL, TCL, Perl, Python, Linux, System Verilog, UVM
4w
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Digital Design Principal Engineer/Manager
Irvine, California, United States
$190k-$225k/yr OnsiteFull Time
20+ YOE20+ years FPGA/SoC development with leadership experience; MS in Electrical Engineering; deep Verilog/SystemVerilog expertise; FPGA/ASIC implementation and packet processing experience; scripting in C/C++, Perl, Tcl, Python.
Verilog, SystemVerilog, AMD (Xilinx Vivado), C, C++, Perl, Tcl, Python, Claude Code, Copilot
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