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244 layout engineer jobs at 103 companies in South San Francisco, CA

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Layout Engineer - Labs
San Francisco, California, United States
$212k-$312k/yr OnsiteFull Time
DoorDash
DoorDashNASDAQ: DASH: On-demand delivery platform connecting consumers with local merchants.
8+ YOE8+ years PCB layout experience, expert Altium Designer skills, strong signal/power integrity and mixed-signal layout knowledge, DFM/IPC familiarity, and cross-functional collaboration on flight-grade hardware.
Altium Designer, SolidWorks, Creo, Gerber, ODB++
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23h
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Package Layout Engineer
Mountain View, California, United States
$157k-$176k/yr HybridFull Time
Lightmatter
Lightmatter: Develops photonic processors and interconnects for AI data centers
5+ YOEBachelor’s or master’s degree in electrical engineering or similar, 5+ years relevant experience, 3–5 years IC package layout design, and Allegro X APD proficiency.
Allegro X APD, Cadence Integrity 3DIC, Expedition Package Designer, Pads Layout, Altium, SKILL, Python
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2w
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PCB Layout Engineer
Oakland, California, United States
$170k-$250k/yr HybridFull Time
DoorDash
DoorDashNYSE: DASH: Local food delivery and on-demand logistics platform.
Strong digital and mixed-signal PCB layout experience; knowledge of stackups, controlled-impedance and high-speed routing, PI/PDN fundamentals, and professional layout tools such as Altium or Cadence.
Altium, Cadence
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2w
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Washington or Arizona or Oregon or California
$136k-$259k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEBachelor's degree in electrical engineering or equivalent experience, 5+ years of PCB layout experience, and expertise with Cadence APD or SiP, high-speed design, substrate layout, and PCB layout tools.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor, CAD
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2w
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PCB Layout Engineer
Mountain View, California, United States
$200k-$275k/yr OnsiteFull Time
DensityAI
DensityAI: Designing custom AI hardware accelerators for large language models.
8+ YOERequires 8+ years of complex high-speed, high-current PCB layout experience, constraint-driven design expertise, and hands-on experience with Cadence Allegro, Siemens Xpedition, Altium, or equivalent tools.
Cadence Allegro, Siemens Xpedition, Altium, Gerber, ODB++, IPC-2581, CoWoS, EMIB, HBM, IPC CID, IPC CID+
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1mo
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PCB Layout Engineer
San Carlos, California, United States
$128k-$160k/yr OnsiteFull Time
Cowboy Space
Cowboy Space: Building satellite-based orbital infrastructure for AI data centers.
1+ YOEBachelor's in EE/CompE/Physics or related, 1+ years PCB layout experience for multilayer/high-speed designs, familiarity with signal/power/thermal/EMI considerations, and experience with PCB design tools and manufacturability.
Altium Designer, Cadence Allegro, Mentor Graphics
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2w
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Oregon or Arizona or Washington or California
$136k-$259k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOEBachelor's degree in electrical engineering or equivalent experience; 5+ years in PCB layout; substrate layout, Cadence APD or SiP, high-speed signal integrity, and related CAD tools required or preferred.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor
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2mo
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides global edge-to-cloud technology solutions and IT infrastructure services.
8+ YOE8+ years PCB layout experience, expert in Cadence Allegro, high-speed design, SI/PI and impedance control, HDI and manufacturing knowledge, ability to lead layout planning and mentor junior designers.
Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Provides edge-to-cloud IT infrastructure and platform services.
8+ YOE8+ years PCB layout experience; expert in Cadence Allegro and Constraint Manager; strong high-speed design, SI/PI, HDI, impedance control, and PCB manufacturing knowledge.
Cadence Design Systems, Cadence Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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Senior PCB Layout Engineer
Sunnyvale, California, United States
$106k-$214k/yr OnsiteFull Time
Hewlett Packard Enterprise
Hewlett Packard EnterpriseNYSE: HPE: Providing global edge-to-cloud infrastructure and IT solutions for businesses.
8+ YOE8+ years PCB layout experience with expert Cadence Allegro proficiency, high-speed design, impedance/stackup planning, HDI, EMI/EMC, PCB fabrication knowledge, and mentoring experience.
Cadence Design Systems, Allegro PCB Designer, Cadence Allegro, Constraint Manager, SKILL, ODB++, IPC-2581, Gerber
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1mo
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Electrical PCB Layout Engineer
South San Francisco, California, United States
OnsiteFull Time
Zipline
Zipline: Operates an autonomous drone delivery system for medical supplies.
Experienced PCB layout engineer skilled in Altium from schematic handoff through fabrication and assembly release, with knowledge of high-/low-speed, power, EMI/thermal, DFM/DFA, and cross-functional collaboration.
Altium Designer, Gerbers, ODB++
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2w
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Package Design & Layout Engineer
Palo Alto, California, United States
OnsiteFull Time
Cspeed IO
Cspeed IO: A stealth startup developing next-generation optical semiconductor solutions for AI infrastructure.
6+ YOE6+ years IC package physical design experience, BS/MS in electrical engineering, expertise in package layout tools, multi-die packaging, substrate stack-ups, DFM/DF A closure, and English fluency.
Cadence Allegro Package Designer, APD+, Siemens Xpedition Package Designer, Synopsys IC Package, SKILL, Python, Cadence Sigrity, PowerSI, Ansys, Virtuoso, KLayout, AutoCAD, Cadence Integrity 3D-IC
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3w
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Staff Engineer, PCB Layout
San Jose, California, United States
$150k-$240k/yr OnsiteFull Time
Celestica
CelesticaNYSE: CLS: Provides design, manufacturing, and supply chain solutions for electronics.
7+ YOE7+ years PCB layout experience with Cadence Allegro (16.x/17.x), high-density and high-speed designs, knowledge of PCB/PCBA manufacturing, IPC standards, signal integrity, EMC/EMI; bachelor's degree or equivalent.
Cadence Allegro, Valor Trilogy 5000
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3w
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Senior / Principal Layout Engineer – Module Architecture (Pathfinding)
San Jose, California, United States
$202k-$344k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
8+ YOEBachelor's in Electrical Engineering,8+ years high-speed PCB layout experience, expertise in DDR/LPDDR, SI/PI and PDN, proficiency with Cadence Allegro/OrCAD and AI tools, ability to influence architecture decisions.
Cadence Allegro, OrCAD, AI tools
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3w
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Senior / Principal Layout Engineer – Module Architecture (Pathfinding)
San Jose, California, United States
$202k-$344k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Manufacturer of semiconductor memory and data storage products.
8+ YOE8+ years high-speed PCB/layout experience, expertise in DDR/LPDDR interfaces, SI/PI and PDN, proficiency with Cadence Allegro/OrCAD, and experience influencing architecture decisions in pathfinding environments.
Cadence Allegro, OrCAD, AI tools
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2mo
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Staff Custom Analog Layout Engineer
San Jose or United States
$139k-$259k/yr HybridFull Time
Nokia
NokiaNYSE: NOK: Sells telecommunications infrastructure and software for global network operators.
10+ YOEBS degree or equivalent; 10+ years in analog/mixed-signal layout design; proficient with layout tools and DRC/LVS/ERC flows.
Virtuoso, Laker, Calibre, PVS, IC Validator, DRC/LVS/ERC tools, RC extraction, EM/IR analysis
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1mo
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Staff PCB Layout Design Engineer
Mountain View or Sunnyvale
$218k-$245k/yr HybridFull Time
General Motors
General MotorsNYSE: GM: Manufactures and sells automobiles and automotive parts globally.
10+ YOEBachelor's in engineering required; 10 years experience in PCB layout and related roles; 8 years with design tools including Mentor Graphics; experience with HDI, high-power boards, high-speed buses, DFM/DFT, and leading design/supplier teams.
Mentor Graphics, ECAD
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3w
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Layout (FIRE) Extraction Engineer
Milpitas, California, United States
$120k-$160k/yr OnsiteFull Time
PDF Solutions
PDF SolutionsNASDAQ: PDFS: Data analytics platform for semiconductor yield improvement.
Bachelor's in electrical engineering or related, experience with OPC/RET and mask/CMOS processes, scripting (Python/Perl/Tcl/Shell), Linux, and collaboration with design/lithography/fab teams.
Mentor Graphics Calibre OPC/ILT, Synopsys Sentaurus/Litho, ASML Brion Tachyon, Cadence, Synopsys, KLayout, Linux, Python, Perl, Tcl, Shell
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2d
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High-Speed Analog Layout Design Engineer
Córdoba or Irvine or San Jose or Canada
HybridFull Time
Celero Communications
Celero Communications: Developing high-performance coherent DSP technology for AI connectivity.
3+ YOERequires 3+ years of analog/mixed-signal layout experience, including 1+ year with TSMC FinFET nodes, expertise in Cadence Virtuoso and verification flows, and proficiency in layout integration and signoff.
Cadence Virtuoso, Pegasus, Calibre, SKILL, TCL, Python, LVS, DRC, PERC, ERC, Density, DFM, Antenna rules
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1mo
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Sr PCB Layout Engineer, Amazon Leo
Austin or Sunnyvale or Redmond or New York or San Diego
$137k-$214k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
7+ YOEBachelor's degree or equivalent, 7+ years PCB layout experience, 5+ years high-speed circuit experience, experience managing multiple projects, U.S. work-authorization required; Mentor Xpedition experience preferred.
Mentor Xpedition
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