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54 packaging design engineer jobs at 21 companies in Austin, TX

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Packaging Engineer Aurora
New Braunfels, Texas, United States
OnsiteFull Time
Aumovio
AumovioFrankfurt Stock Exchange: AMV0: Manufactures electronics and software for autonomous and connected vehicles.
Bachelor's degree in a technical field required. Requires packaging design or engineering knowledge, problem-solving and communication skills; 2 years packaging experience and CAD experience are preferred.
SAP, SupplyOn, CAD
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1w
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Entry Level Packaging Systems Design Engineer I (Start Summer 2027)
Austin, Texas, United States
$78k-$82k/yr FieldFull Time
Dennis Group
Dennis Group: A design-build engineering firm and general contractor that plans, designs, engineers, and builds food and beverage processing facilities.
0+ YOEBachelor's degree in mechanical, packaging, industrial, or manufacturing engineering; 0–3 years of relevant work or schooling; MS Office, MS Project, and AutoCAD familiarity; strong communication and problem-solving skills.
Microsoft Office, Microsoft Project, AutoCAD
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Advanced Packaging Engineer
North America or California or Austin or Boston
$250k-$400k/yr HybridFull Time
Volantis Semiconductor
Volantis Semiconductor: Private semiconductor startup building photonically integrated computers and photonic interconnects for AI inference and data-center systems.
Experience designing or developing processes for complex packages; first-principles problem solving. Preferred: heterogeneous materials, high-TDP packages, compound semiconductors, optics, interposers, flip-chip integration, or large substrates.
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2w
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Package Layout Design Engineer , Annapurna Labs - AI Silicon Packaging
Tempe or Austin or Cupertino
$136k-$213k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Multinational technology focused on e-commerce and cloud computing.
5+ YOEBachelor's degree in electrical engineering or related field and 5+ years of IC package layout and physical design experience. Requires package layout tools, advanced packaging, DFM, and physical verification expertise.
Cadence APD/SiP, Synopsys IC Packaging, Mentor Xpedition, Python, Perl, ARM, TCL, Skill, Ravel, DRC
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AI Automation Design Packaging Lead
Austin, Texas, United States
$163k-$244k/yr HybridFull Time
AMD
AMDNASDAQ: AMD: Leader in high-performance computing, graphics, and visualization technologies.
Technical leader to develop and deploy AI-driven packaging design automation. Requires bachelor's or master's in EE/CE/CS, experience with EDA tools, scripting (Python/Tcl/SKILL/C++), AI/ML frameworks, and cross-functional leadership.
Cadence APD/SIP, Siemens Xpedition, Synopsys 3DIC/Compiler, Python, Tcl, SKILL, C++, PyTorch, TensorFlow
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Materials Engineer, Packaging Product Design
Austin, Texas, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designing and manufacturing consumer electronics, software, and digital services.
Collaborates on structural packaging design and execution, balancing customer experience, product protection, sustainability, and cross-functional design requirements.
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Package Design Methodology Engineer
Santa Clara or Austin or California
$136k-$265k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Computing platform for AI and accelerated graphics.
5+ YOEBS or equivalent and 5+ years developing package design flows; strong Python/C++ skills; experience applying AI/ML and LLMs in engineering workflows; solid VLSI package design fundamentals.
Python, C++, LLMs, EDA, AI/ML
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4w
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Package Design Engineer
San Jose or Austin or Fort Collins
$122k-$195k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
6+ YOEBSEE with 8+ years or MSEE with 6+ years in flip-chip BGA package design; knowledge of package signal and power integrity; Cadence APD and Cadence SKILL experience preferred; project management and collaboration skills.
Cadence APD, Cadence SKILL
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Package Design Methodology Engineer
Santa Clara or Austin or California
$136k-$265k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Computing platform for AI and accelerated graphics.
5+ YOEBS in computer science, electrical engineering, or related field; 5+ years developing scalable package design flows and methodologies; Python or C++; AI/ML engineering experience; VLSI package electrical fundamentals.
Python, C++, VLSI, EDA, LLMs
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Staff Package Design Engineer
Tempe or Austin
HybridFull Time
Renesas Electronics
Renesas ElectronicsTokyo Stock Exchange: 6723: Designs and manufactures semiconductors for automotive and industrial systems.
4+ YOE4+ years package CAD/layout or substrate design experience, proficiency with Cadence Allegro Package Designer/SiP Layout or Siemens Xpedition, knowledge of DFM/DF A, SI/PI fundamentals, and collaboration with foundries/OSATs; Bachelor's in EE/microelectronics/materials preferred.
Cadence Allegro Package Designer / SiP Layout, Siemens Xpedition Substrate Integrator, Gerber
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Package Design Methodology Engineer
Santa Clara or Austin or United States
$136k-$265k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOEBS in CS/EE or equivalent,5+ years developing package design flows/methodologies,proficiency in Python and/or C++,knowledge of VLSI package electrical fundamentals,experience applying AI/ML or LLMs in engineering workflows.
Python, C++, LLMs, EDA
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2mo
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Sr. Engineer, Package Design
Santa Clara or Austin or Toronto or New Taipei City
$100k-$500k/yr HybridFull Time
Tenstorrent
Tenstorrent: Builds computers for artificial intelligence.
3+ YOE3+ years experience with Cadence Allegro PCB Designer, PCB routing and BGA design, signal and power integrity knowledge, strong communication and cross-discipline collaboration skills.
Cadence Allegro PCB Designer
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3mo
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Sr. IC Package Design Engineer (Silicon Engineering)
Austin or Irvine
OnsiteFull Time
SpaceX
SpaceXNasdaq: SPCX: Designing, manufacturing, and launching advanced rockets and spacecraft.
5+ YOEBachelor's degree in electrical/computer engineering or physics; 5+ years IC package design experience; strong SI/PI, RF, and CAD tool proficiency.
Cadence APD+/SIP, SIWave, HFSS, ADS, Package design tools
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4w
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Senior IC Package Design Engineer - TeraWave
San Diego or Austin or California
$230k-$323k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
7+ YOEBachelor's in EE or related,7+ years industry experience delivering IC packaging,expertise with HFSS/EMX/Momentum,Cadence Allegro experience preferred,RF/mmWave and power/signal integrity expertise,U.S. work authorization required.
HFSS, EMX, Momentum, Cadence Allegro
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Design & Verification Engineer, Analog Power Management (7682) (Austin, TX, US)
Austin, Texas, United States
$120k-$170k/yr OnsiteFull Time
TSMC
TSMCNew York Stock Exchange: TSM: Manufactures advanced semiconductor integrated circuits for global technology companies.
7+ YOEMSEE with 7+ years in hands-on power management design/verification; SIMPLIS knowledge; PCB design/layout in PM; IC design/packaging familiarity; strong teamwork; power delivery modeling
SIMPLIS, PCB Design, Power Delivery Modeling
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Principal EDA R&D Engineer, Advanced Packaging
Austin, Texas, United States
$166k-$249k/yr OnsiteFull Time
Synopsys
SynopsysNASDAQ: SNPS: Provider of electronic design automation software and semiconductor IP.
10+ YOEBachelor's or master's degree or equivalent experience; 10+ years in EDA software development; expertise in package substrate design, automation, computational geometry, and programming with Python or TCL.
C++, Python, TCL, ODB++
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Physical Design - SOC Top Lead
San Jose or Pittsburgh or Austin
$200k-$250k/yr OnsiteFull Time
Efficient Computer
Efficient Computer: Energy-efficient processor building programmable general-purpose chips for AI and edge applications.
8+ YOEEnd-to-end SOC top ownership including full-chip integration, timing closure, power/PDN analysis, physical verification, SI, clock/reset, DFT, package co-design, and tapeout readiness; advanced degree in EE and extensive PD experience.
Innovus, ICC2, Tempus, PrimeTime, RedHawk, Calibre, Voltus, TCL, shell, python
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PCB Design Engineering Section Lead
Hudson or Fort Wayne or Austin
$133k-$226k/yr OnsiteFull Time
BAE Systems
BAE SystemsLSE: BA.: Global defense, aerospace, and security technology.
Bachelor's degree in engineering, broad military electronics packaging design experience, organizational leadership, strong PCB design background, communication skills, and ability to obtain Secret clearance.
Cadence Allegro, IPC
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6d
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Director of Package Design
Mountain View or Redmond or Hillsboro or Austin or Raleigh
$143k-$275k/yr HybridFull Time
Microsoft
MicrosoftNASDAQ: MSFT: Multinational technology providing software, cloud, and AI solutions.
3+ YOERequired: doctorate plus 3+ years, master's plus 6+ years, bachelor's plus 8+ years, or equivalent. Preferred: 15+ years semiconductor package experience and advanced packaging, CAD, simulation, supplier, and manufacturing expertise.
Cadence Allegro, EDA, BGA
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2mo
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Mechanical Engineer, Staff to Principal level
Austin, Texas, United States
$110k-$183k/yr OnsiteFull Time
Enphase Energy
Enphase EnergyNASDAQ: ENPH: Manufacturer of microinverter-based solar and energy storage systems.
8+ YOEExperienced mechanical design engineer for high-power electrical equipment; strong busbar, wire-harness, board-packaging, insulation coordination, manufacturability, FEA/CFD, and SolidWorks skills; mentoring experience.
SolidWorks, FEA, CFD, CNC
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