Renesas ElectronicsTokyo Stock Exchange: 6723: Designs and manufactures semiconductors for automotive and industrial systems.
Proven leader in digital IC design and verification for mixed-signal SoCs with expertise in RTL, verification methodologies (UVM, formal, AMS/DMS), architecture, and team building.
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
15+ YOE15+ years functional verification experience; expertise in SystemVerilog, UVM, formal methods, RTL and SoC verification; BS/MS in EE/CE or related; strong communication, mentoring, and problem-solving skills.
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
5+ YOEBachelor's in STEM +5 years (or Master's +3 / PhD +1) experience in RTL/HDL FPGA/ASIC design for aerospace/space, proficiency in FPGA design flow, verification, synthesis, timing and power analysis; strong communication and problem solving.
HDL, RTL, Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify, System Verilog, Universal Verification Methodology (UVM), Signal Generators, Logic Analyzers, Digital Oscilloscopes, Embedded FPGA Debugging tools
ViasatNASDAQ: VSAT: Provider of global satellite-based connectivity and secure communication solutions.
6+ YOEBachelor's in Electrical/Computer Engineering; 6+ years FPGA design; SystemVerilog/VHDL; RTL design; lab/test experience; US citizenship; travel up to 10%
NXP SemiconductorsNASDAQ: NXPI: Designs and manufactures semiconductors for automotive and IoT applications.
3+ YOEMaster's (MSEE) in relevant fields, 3+ years DfT/digital design experience, strong RTL coding and verification skills, Verilog/SystemVerilog proficiency, problem solving and communication skills.
Northrop GrummanNYSE: NOC: Designs and manufactures advanced aerospace and defense systems.
5+ YOEBachelor's in STEM with 5+ years (or equivalent advanced degree experience), RTL/HDL FPGA/ASIC design experience for space/aerospace, proficiency in FPGA design flow, simulation, synthesis, timing analysis, and V&V.
Xilinx ISE, Vivado, Mentor Graphics ModelSim, QuestaSim, Synplify, System Verilog, Universal Verification Methodology (UVM)
ViasatNASDAQ: VSAT: Provides global satellite broadband and secure networking communication services.
8+ YOE8+ years design verification experience with UVM, SystemVerilog, RTL verification for FPGA/ASIC, Bachelor's in EE/CE, US citizenship, ability to obtain Secret clearance, familiarity with Questa/Xcelium/VCS and AI verification tools.
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
4+ YOEMaster's degree in Electrical Engineering, Materials Engineering, or Physics with 4 years in design verification; or Bachelor's with 6 years; strong SystemVerilog/UVM skills; Verilog-RTL, mixed-signal verification; Xcelium/VCS; scripting (Perl/Python/C).
SystemVerilog, UVM, Verilog-AMS, Cadence AMS, Xcelium, VCS, Perl, Python, C
Systems and Test Integration Engineer - FPGA Integration & Verification
Scottsdale, Arizona, United States
$91k-$101k/yrOnsiteFull Time
General Dynamics Mission SystemsNYSE: GD: Engineers secure communication and mission-critical defense technology systems.
2+ YOEBachelor's in systems/engineering/math plus 2+ years (or Master's plus 6 months), TS/SCI clearance obtainable, FPGA design and hardware bring-up experience, RTL (SystemVerilog/VHDL), scripting (Python,Tcl), Linux and Git proficiency.
Fidus Systems: Designs high-complexity electronic systems and embedded software for global clients.
5+ YOE5+ years electronics design experience, Bachelors in Electrical/Computer Engineering, high-speed PCB and system design expertise, familiarity with FPGA and signal integrity, bench bring-up and test experience.
LTSpice, OrCAD Capture CIS, Cadence CIS, Cadence Allegro, Verilog, RTL, HLS, optical test set, signal analyzer, oscilloscope, VNA, signal generator
Senior Principal Mixed Signal Design Engineer (Hybrid)
Goleta or Phoenix
$146k-$277k/yrHybridFull Time
RTXNYSE: RTX: Provides advanced aerospace and defense systems and services.
10+ YOESTEM degree with 10+ years of relevant experience or advanced degree with 7+ years; requires mixed-signal ASIC/ROIC, CMOS IC design, semiconductor processing, simulation, layout, testing, and team leadership experience.