50 rtl jobs at 23 companies in Newton, MA
1mo
Save
Mark Applied
Hide
Interconnect Micro-architect/RTL Design Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
3w
Save
Mark Applied
Hide
Principal PCIe Subsystem RTL lead
San Jose or Santa Clara or Austin or Seattle or Boston
HybridFull Time
10+ YOE10+ years digital IC design experience with 4+ years PCIe subsystem design/integration, strong SystemVerilog RTL skills, experience integrating PCIe controller/SerDes PHY, multi-clock-domain design, and ability to lead architectural work.
SystemVerilog, UVM, PCIe, CXL, SerDes
2d
Save
Mark Applied
Hide
RTL Design Engineer (TERADYNE, North Reading, MA)
North Reading, Massachusetts, United States
$123k-$197k/yr OnsiteFull Time
5+ YOEBSEE or MSEE in electrical engineering or related field and 5+ years of experience. Requires Verilog RTL, logic design, synthesis, timing, CDC, STA, memory, serial, and Python, Tcl, or Make scripting experience.
Verilog, Python, Tcl, Make
3mo
Save
Mark Applied
Hide
Software Engineer II (Full Stack, Platform)
Boston, Massachusetts, United States
$125k-$175k/yr OnsiteFull Time
3+ YOE2–4 years experience; JS/TypeScript, React, Node.js; REST APIs; i18n, RTL; UI components; CI/CD; collaboration.
JavaScript, TypeScript, React, Node.js, REST APIs, PostgreSQL, MySQL, CircleCI, GitHub Actions, Figma, CSS, WCAG, Storybook, i18n, RTL, BiDi
1w
Save
Mark Applied
Hide
Sr. ASIC Design Engineer, Blink/Ring ASIC Team
North Reading, Massachusetts, United States
$159k-$215k/yr OnsiteFull Time
Bachelor's in Electrical Engineering, knowledge of UVM and Matlab, experience delivering products to volume production, low-power design expertise, RTL coding and debug, and leadership in technical initiatives.
UVM, Matlab, RTL
3mo
Save
Mark Applied
Hide
Principal Firmware/FPGA Engineer (Onsite)
Cambridge, Massachusetts, United States
$108k-$205k/yr OnsiteFull Time
8+ YOE8+ years in STEM or an advanced degree with 5+ years; FPGA RTL/Verilog/VHDL; DSP fundamentals; high-speed interfaces; scripting; ability to obtain security clearance
Verilog, VHDL, RTL, FPGA, C++, Python, bash, Tcl, Ethernet, sFPDP, HBM2, DDR, Linux, Petalinux
4d
Save
Mark Applied
Hide
Power Management Design Engineer
Santa Clara or Cambridge or Austin or Boston
$159k-$194k/yr OnsiteFull Time
3+ YOERequires 3+ years in CPU/SoC clocking, reset, and power-management design; RTL proficiency; CPU or SoC development through tapeout; and a BS/MS in a technical discipline or equivalent experience.
Verilog, SystemVerilog, VHDL, SpyGlass, AMBA, AXI, AHB, APB, Scala, Chisel, Bluespec, RISC-V, Git, GitHub, Jira, Confluence, Lint, CDC, RDC, MBIST, DFT, DVFS, RTL
3mo
Save
Mark Applied
Hide
Senior Engineer, Digital Design Engineering
Wilmington, Massachusetts, United States
$124k-$175k/yr HybridFull Time
2+ YOEMaster’s degree in Electrical/Electronic/Computer Engineering or related field; 2+ years in digital/mixed-signal design and verification; proficiency with RTL, Verilog/SystemVerilog; experience with Cadence or Synopsys tools.
Verilog, SystemVerilog, RTL, Cadence, Synopsys
3mo
Save
Mark Applied
Hide
FPGA Engineer (MA, Boston)
Boston, Massachusetts, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience with RTL, HDL, C/C++, Python; VHDL/Verilog; hardware security; IP core development; FPGA toolchains; Xilinx/Intel devices; simulation and verification; system integration; embedded software testing; cryptography; cocotb/pyuvm.
RTL, VHDL, Verilog, Python, C, C++, Tcl, Vivado, GHDL, Questa, Quartus Prime, Zynq, Versal, Stratix, Agilex, AXI, ACE, Avalon, IP core, Xilinx, FPGA verification tools, cocotb, pyuvm
2mo
Save
Mark Applied
Hide
Staff Engineer, Digital ASIC Design (CONTRACT)
Burlington or New York
HybridContract
8+ YOEBS/MS/PhD in EE/CE; 8+ yrs in digital IC/ASIC/SoC; RTL ownership; SystemVerilog/Verilog; high-throughput datapaths; silicon constraints; SV/UVM; Python/cocotb; post-silicon bring-up.
SystemVerilog/Verilog, UVM, Python, cocotb, RTL, RTL verification, Fixed-point modeling
2mo
Save
Mark Applied
Hide
FPGA Engineer
Boston, Massachusetts, United States
OnsiteFull Time
RTL proficiency (Verilog or VHDL), real industry FPGA deployment experience, familiarity with major FPGA platforms (Xilinx/AMD, Lattice, Intel/Altera), embedded C/C++ experience, and experience with prototype bring-up and ASIC verification workflows.
Verilog, VHDL, C, C++, RTL, FPGA, Xilinx, AMD, Lattice, Intel/Altera, ASIC, ADC, DAC
2mo
Save
Mark Applied
Hide
Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
1w
Save
Mark Applied
Hide
Senior FPGA Engineer
Norwood, Massachusetts, United States
OnsiteFull Time
7+ YOE7+ years FPGA/RTL experience, proficiency with RTL design and simulation, Verilog/SystemVerilog, Modelsim/VCS/Xcelium; BS/MS/PhD required; experience with AMD/Altera toolchains preferred.
Modelsim, VCS, Xcelium, Python, C/C++, Verilog, System Verilog
2mo
Save
Mark Applied
Hide
Senior Digital Engineer
Sydney or Sydney or Irvine or Boston or Bangalore or Cambridge or Hangzhou or Taipei or Tokyo or Sydney
OnsiteFull Time
5+ YOE5+ years as Senior Digital Engineer; strong Verilog/SystemVerilog; RTL design; low-power techniques; collaborate with firmware/PHY teams.
Verilog/SystemVerilog, C, Python, Tcl, Shell, Makefiles, UPF/CPF, Scripting and automation
2w
Save
Mark Applied
Hide
Electrical Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS/MS in Electrical or Computer Engineering,1-4 years EE experience,schematic design and FPGA RTL with Verilog,OrCAD proficiency,technical writing and strong communication skills.
OrCAD, Verilog, ModelSim, Quartus, Git, SVN, oscilloscope, logic analyzer, frequency generator
1mo
Save
Mark Applied
Hide
Principal FPGA Digital Design Engineer - Sign-on Bonus
Nashua, New Hampshire, United States
OnsiteFull Time
6+ YOESecret-clearable engineer with 6+ years FPGA/ASIC experience, VHDL/Verilog RTL coding, timing closure, lab debug, familiarity with high-speed interfaces and revision control.
VHDL, Verilog, Xilinx Vivado, Intel/Altera Quartus, ChipScope, SignalTap, ILA, Modelsim, Questa, GIT, CVS, Clearcase, Subversion, Perl, Tcl, Python, shell, Matlab, Simulink, UVM, SystemVerilog, C, C++
1mo
Save
Mark Applied
Hide
Senior ASIC Hardware Design Engineer
Westford, Massachusetts, United States
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's or Master's in EE/CE/CS (or equivalent) with 5+ years industry experience; strong Verilog/SystemVerilog and RTL/microarchitecture experience; scripting in Perl or Python; understanding of physical implementation and VLSI.
Verilog, SystemVerilog, Perl, Python
1mo
Save
Mark Applied
Hide
Senior ASIC Hardware Design Engineer
Westford, Massachusetts, United States
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelors in EE/CE/CS (or equivalent) and 5+ years experience; strong Verilog/SystemVerilog skills, RTL/micro-architecture experience, Python/Perl scripting, understanding of physical implementation and VLSI.
Verilog, SystemVerilog, Perl, Python
2w
Save
Mark Applied
Hide
Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
1w
Save
Mark Applied
Hide
Electrical Design Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS or MS in Electrical/Computer Engineering, 1+ years electrical engineering experience, schematic design and FPGA/RTL with Verilog, proficiency with OrCAD and lab bring-up tools, strong communication and technical writing.
OrCAD, FPGA, Verilog, ModelSim, Quartus, I2C, SPI, QSPI, Ethernet, oscilloscopes, logic analyzers, frequency generators, Git, SVN
Explore Jobs
Expand Your Job Search
Top Cities Near Newton for Rtl
- Rtl jobs in Boston, MA
- Rtl jobs in Worcester, MA
- Rtl jobs in Providence, RI
- Rtl jobs in Lowell, MA
- Rtl jobs in Cambridge, MA
- Rtl jobs in Manchester, NH
- Rtl jobs in Brockton, MA
- Rtl jobs in Fall River, MA
- Rtl jobs in Quincy, MA
- Rtl jobs in Lynn, MA
- Rtl jobs in Nashua, NH
- Rtl jobs in Warwick, RI
- Rtl jobs in Cranston, RI
- Rtl jobs in Somerville, MA
- Rtl jobs in Lawrence, MA
- Rtl jobs in Pawtucket, RI
- Rtl jobs in Framingham, MA
- Rtl jobs in Waltham, MA
- Rtl jobs in Haverhill, MA
- Rtl jobs in Malden, MA