180 verification engineer jobs at 70 companies in Los Angeles, CA
2w
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ASIC Verification Engineer
Irvine or San Jose
$101k-$162k/yr OnsiteFull Time
3+ YOEEngineering degree (Bachelors/Masters/PhD) with 3+ years verification experience (varies by degree), proficiency in HDL and verification, C/C++, scripting, strong communication and teamwork.
SystemVerilog UVM, SystemVerilog, Verilog, VHDL, C, C++, Python, PERL, TCL
3w
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Design Verification Engineer
Aliso Viejo or San Jose or Córdoba or Toronto
OnsiteFull Time
3+ YOEBachelors in EE/CE/CS,3+ years verification experience, SystemVerilog/UVM, coverage-driven verification, C/C++ and scripting (Python,Tcl,Perl),test planning and debug skills.
SystemVerilog, UVM, C, C++, Python, Tcl, Perl
2d
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Staff Design Verification Test Engineer
Costa Mesa, California, United States
$191k-$253k/yr OnsiteFull Time
12+ YOEBachelor's degree in engineering, physics, or related field; 12+ years in test, verification, or product engineering; RF/microwave measurement, DVT, NPI, failure triage, and engineering leadership experience.
Lattice OS, spectrum analyzers, signal analyzers, VNAs, signal generators, power meters
2mo
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Principal Design Verification Engineer (Silicon Engineering)
Sunnyvale or Austin or Irvine or Redmond
$210k-$310k/yr OnsiteFull Time
10+ YOEBachelor’s in electrical/computer engineering or computer science; 10+ years in design verification and test bench development.
UVM, OVM, VMM, Python, RTL
2mo
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Senior ASIC Design Verification Engineer - Terawave
Los Angeles or Seattle or California or Washington or Texas or United States
$230k-$323k/yr RemoteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
8+ YOEBS/MS in EE/CE, 8+ years ASIC/SoC verification experience, deep System Verilog and UVM expertise, verification planning, coverage closure, RTL/debugging, cross-functional collaboration.
System Verilog, UVM, RTL
1mo
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Senior Software Verification & Validation Engineer
Irvine, California, United States
OnsiteFull Time
3+ YOEBachelor's in a technical discipline, 3+ years embedded software V&V or system testing, experience with requirements-based verification, Python scripting, test documentation, and cross-functional collaboration.
Python, JIRA, Azure DevOps, Polarion, Jama, Windows, Microsoft Word, Microsoft Excel, Microsoft PowerPoint, Microsoft Outlook, multimeter, oscilloscope, function generator, logic analyzer
3mo
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Sr. Satellite Design Verification Engineer, Amazon Leo
Irvine or Austin or Sunnyvale or Redmond or San Diego
OnsiteFull Time
7+ YOEBachelor's in Electrical/Communications Engineering; 3+ years UVM/SystemC/DPI-C; 7+ years verification in communications; preferred advanced degree; Matlab familiarity; DV/integration experience.
UVM, C, SystemC, DPI-C, Matlab
1mo
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Principal Systems Engineer - Requirements & Verification
San Diego or El Segundo or Palmdale
$114k-$171k/yr OnsiteFull Time
1+ YOEBachelor's in STEM +5 yrs, Master's +3 yrs, or PhD +1 yr; active Top Secret clearance (or background within 6 years); ability to obtain SAP clearance; experience in requirements decomposition, verification, integration, ICDs, system test, DOORS and Atlassian tools.
DOORS, Atlassian Tool Suite, Agile Design Methodology
1mo
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Principal ASIC Design Verification Engineer
United States or Los Angeles
$190k-$285k/yr OnsiteFull Time
10+ YOEB.S. or M.S. in EE/CE or related, 10+ years ASIC/SoC verification, strong SystemVerilog/UVM and SVA skills, experience with VCS/Xcelium/Questa and Verdi/SimVision, scripting (Python/Perl/TCL), Git, CI/CD, C/C++, and ITAR U.S. person eligibility.
SystemVerilog, UVM, SystemVerilog Assertions (SVA), VCS, Xcelium, Questa, Verdi, SimVision, Python, Perl, TCL, Git, C, C++, CI/CD
4w
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V and V Engineer System Verification Engineer
Irvine, California, United States
$120k-$130k/yr OnsiteFull Time
10+ YOE9+ years system/software testing in aerospace with embedded testing, scripting for automation, avionics standards (DO-178b/ARP-4754A), experience with A429/CAN and tools like DOORS, SVN or MKS; Bachelor's in computer science required.
DOORS, SVN, MKS, A429, CAN, DO-178b
2mo
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Senior ASIC/FPGA Verification Engineer (Onsite)
El Segundo or Fullerton
$96k-$182k/yr OnsiteFull Time
5+ YOEActive transferable U.S. SECRET clearance and U.S. citizenship, STEM degree (BS or advanced) with 5+ years (BS) or 3+ years (advanced) experience, RTL verification using VHDL/Verilog/SystemVerilog, testbench and coverage, and revision control (Git/Subversion).
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
2mo
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Sr. Principal AMS Verification Engineer (Irvine, CA, US)
Irvine, California, United States
$143k-$286k/yr OnsiteFull Time
8+ YOERequires BS+15 yrs (MS+12 or PhD+8) experience; strong AMS design/verification background, Verilog-A and SystemVerilog RNM modeling, Cadence Virtuoso/ADS experience, Python scripting, leadership and communication skills.
Cadence Virtuoso, ADS, Verilog-A, SystemVerilog, SystemVerilog Real Number Modeling (RNM), Python
1mo
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Senior Software Verification & Validation Engineer
Irvine, California, United States
$88k-$147k/yr OnsiteFull Time
3+ YOEBachelor's in engineering or CS,3+ years embedded/software V&V experience,requirements-based testing,Python automation,defect tracking tools (JIRA,Azure DevOps,Polarion,Jama),Windows and Microsoft Office proficiency.
Python, JIRA, Azure DevOps, Polarion, Jama, Windows, Microsoft Word, Microsoft Excel, Microsoft PowerPoint, Microsoft Outlook, multimeter, oscilloscope, function generator, logic analyzer
1mo
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Senior/Principal Full-Chip Physical Verification Engineer
San Jose or Irvine
$150k-$250k/yr OnsiteFull Time
7+ YOE7+ years full-chip physical verification experience, BS in Electrical Engineering (MS preferred), hands-on with ICV or Calibre, DRC/ERC analysis, tapeout experience, floorplanning expertise; Tcl/Python/shell scripting preferred.
ICV, Calibre, Tcl, Python, shell
1mo
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
2mo
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Wireless SOC Verification Engineer
Irvine, California, United States
OnsiteFull Time
Experience verifying complex SoCs using UVM testbenches, developing coverage-driven and directed tests, deploying AI tools, and collaborating across product teams to improve tape-out readiness.
UVM
5d
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Hardware Verification Engineer (TERADYNE, Agoura Hills, CA)
Agoura Hills, California, United States
$165k-$265k/yr OnsiteFull Time
10+ YOEBachelor’s degree in Engineering or Physics, 10+ years related experience preferred, and leadership experience. Requires programming in Verilog and SCPI, mixed-signal systems expertise, and proficiency with benchtop test equipment.
VBA, Python, MATLAB, C++, Verilog, SCPI, Git, power supplies, SMUs, semiconductor parameter analyzers, multimeters, signal generators, AWGs, pattern generators, BERTs, oscilloscopes, VNAs, spectrum analyzers
3w
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Mission Engineer Requirements Verification
Chantilly or El Segundo or Colorado Springs
$160k-$200k/yr OnsiteFull Time
12+ YOEActive TS/SCI, Bachelor's+14yrs or Master's+12yrs in math/science/engineering, extensive systems engineering and integration experience with space and ground segments, modeling and mission analysis expertise, strong communication skills.
3w
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Mission Engineer Requirements Verification
Chantilly or El Segundo or Colorado Springs
OnsiteFull Time
12+ YOEBachelors+14yrs or Masters+12yrs in math/science/engineering, active TS/SCI clearance, modeling and simulation expertise, experience with SDA/DoD/NRO acquisition and mission-level V&V.
1mo
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Director of Verification & Validation
Huntington Beach, California, United States
$180k-$230k/yr OnsiteFull Time
8+ YOEBachelor's in Biomedical or Mechanical Engineering, 8+ years Class III medical device V&V, knowledge of FDA and IEC/ISO standards, design control expertise, strong technical writing, and experience leading V&V teams.
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