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34 asic engineer jobs at 18 companies in Fairfield, CA

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Distinguished Engineer, ASIC (CONTRACT)
Burlington or New York or San Francisco
HybridContract, Temporary
Butterfly Network
Butterfly NetworkNYSE: BFLY: Handheld whole-body ultrasound scanners powered by semiconductor technology.
8+ YOE8–12+ years in digital IC/ASIC/SoC design; strong RTL SystemVerilog; tapeout experience; cross-functional collaboration.
SystemVerilog, Verilog, RTL, ASIC, SoC, clock_domain, PPA tools
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3mo
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ASIC Design Engineer - Cache Controller
Santa Clara or San Francisco Bay Area
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
3+ YOE3+ years ASIC design experience; memory system development; RTL/micro-architecture; PPA analysis; B.S. in a related field.
RTL, HDL, Timing analysis, PPA analysis
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3mo
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ASIC Validation Engineer
Bay Area, California, United States
$168k-$297k/yr RemoteFull Time
Block
BlockNYSE: XYZ: Creates financial tools for businesses and individuals.
4+ YOEBachelor's in Electrical Engineering; 4+ years in silicon/hardware validation; lab experience; scripting (Python); cross-functional collaboration.
Python, lab equipment, oscilloscopes, logic analyzers, power supplies, SPI, I2C, JTAG, UART
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2mo
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Lead ASIC/FPGA Design Engineer
Livermore, California, United States
OnsiteFull Time
Aalyria
Aalyria: Provides laser communications and networking platforms for aerospace.
5+ YOELead RTL design of high-speed ASIC/FPGA modem; strong DSP, FEC integration, and power/performance optimizations; requires security clearance.
Verilog, SystemVerilog, LINT, CDC, RDC, Test benche s, Synthesis, Power/Area analysis, STA, Place and Route
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2mo
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Software Engineer, ASIC
Austin or South San Francisco
$123k-$216k/yr OnsiteFull Time
Neuralink
Neuralink: Developing implantable brain-computer interfaces to restore human capabilities.
Bachelor's degree in computer science or related field; experience with EDA compute environments; proficiency in Rust/Go/C++; Linux storage and datacenter systems; multi-cloud/hybrid deployments; embedded cross-compilation toolchains.
Rust, Python, Go, Cadence, Terraform, Ansible, Packer, MAAS, Bazel, Nix, Prometheus, ClickHouse, Grafana, Ray, Docker, Kubernetes, AWS, OCI, RHEL, Ubuntu
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1w
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Hardware Engineer - FPGA
Milpitas or San Francisco
$152k-$222k/yr OnsiteFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
7+ YOEExperienced FPGA/ASIC engineer with RTL (Verilog/SystemVerilog) skills, FPGA tool experience, 7+ years (BS) or 4+ years (MS), verification experience (UVM/VMM) preferred.
Verilog, SystemVerilog, UVM, VMM
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3w
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Manufacturing Engineer, Advanced
Santa Rosa, California, United States
$101k-$168k/yr OnsiteFull Time
Keysight Technologies
Keysight TechnologiesNYSE: KEYS: Provides electronic design, test, and simulation software and hardware.
7+ YOEBSEE or MSEE; 7+ years manufacturing engineering experience with high-speed electrical components; CPI/Lean and Six Sigma experience; ASIC failure analysis; strong RF fundamentals.
Continuous Process Improvement (CPI), Lean, Six Sigma
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3mo
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Power Infrastructure Engineer
Santa Clara or Berkeley or Austin or Bengaluru or Hsinchu
$206k-$251k/yr OnsiteFull Time
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
5+ YOEMS or PhD in Computer Science or Computer Architecture; 5+ years in power benchmarking, analysis, and modeling; experience with ASIC power analysis; hardware/software integration; ability to balance performance and power.
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1w
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IC Design Engineer
Berkeley, California, United States
$111k-$223k/yr OnsiteFull Time
Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory: Conducts scientific research to address global challenges.
2+ YOEDesign and develop high-performance analog/mixed-signal ASICs, perform block design, layout, verification, test and chip integration; collaborate with scientific teams; proficiency with IC design suites and simulators.
Cadence, Spectre, Eldo, HSPICE, FPGA, Verilog, VHDL, PDK
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IC Design Engineer
Berkeley, California, United States
$125k-$182k/yr OnsiteFull Time
Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory: Conducts multidisciplinary scientific research for the U.S. Department of Energy.
2+ YOE2+ years IC design experience (Level 2) or equivalent advanced degree; strong analog/mixed-signal design skills; proficiency with Cadence and transistor-level simulators; ability to design, test, and integrate ASICs for scientific instruments.
Cadence, Spectre, Eldo, HSPICE, Verilog, VHDL, FPGA, PDK
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Research Engineer, Chip Design RL (Reinforcement Learning)
San Francisco or New York City
$500k-$850k/yr HybridFull Time
Anthropic
Anthropic: Developing safe and reliable artificial intelligence systems.
Bachelor's or equivalent, expertise in ASIC/FPGA design and EDA tools, experience with RTL, verification (UVM, formal methods), physical design and tapeout experience; RL experience and tooling experience preferred.
EDA tools, UVM, formal methods, place-and-route
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4w
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IP Logic Design Engineer
Rancho Cordova, California, United States
$105k-$165k/yr OnsiteFull Time
Solidigm
Solidigm: Develops and manufactures NAND flash memory and solid-state drives.
7+ YOEMS in ECE with 7+ years or BS with 9+ years; expertise in Verilog/SystemVerilog and ASIC flow (RTL, synthesis, STA, ECO); experience with lint, CDC/RDC analysis, verification tools, scripting, and pre/post-silicon debug; 3D NAND experience preferred.
SystemVerilog, Verilog, RTL, synthesis, Static Timing Analysis (STA), ECO, lint tools, CDC/RDC analysis, SystemVerilog Assertions (SVAs), Gate-level simulation (GLS), Design for Testability (DFT)
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2mo
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Networking Operating System Firmware Engineer
San Francisco, California, United States
$266k-$445k/yr HybridFull Time
OpenAI
OpenAI: Develops artificial intelligence models and generative AI software services.
Networking OS firmware, NOS images, Linux kernel, switch ASICs, SAI; strong C/C++, Python, Go or Rust; experience with NOS stacks (SONiC, FRR) and OpenAI-scale infrastructure.
SONiC, FRR, Linux, SAI, ASIC_SDK, C/C++, Python, Go, Rust
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1mo
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Digital Verification Engineer - Weapon Subsystems 2
Livermore or California or New Mexico or United States
$122k-$238k/yr HybridFull Time, Temporary
Sandia National Laboratories
Sandia National Laboratories: Federal research and development laboratory for national security.
Bachelor's degree or equivalent, ability to obtain DOE Q-level (Top Secret) clearance, several years applying formal verification to FPGA/ASIC, proficiency with VHDL, Verilog, and SystemVerilog Assertions (SVA), strong analytical and written communication skills.
VHDL, Verilog, SystemVerilog Assertions (SVA)
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1w
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Sr. Staff, Instrument Software Engineer
South San Francisco, California, United States
$175k-$210k/yr OnsiteFull Time
Atlas Data Storage
Atlas Data Storage: A high-growth startup developing molecular computing and biological data storage technologies.
10+ YOESenior staff-level software engineer with ~10+ years experience; expertise in C/C++/C#/Rust/TypeScript/Python, firmware and hardware integration, RTOS, memory management, and large-data performance optimization.
C#, C++, C, Rust, TypeScript, Python, Git, AWS, Azure, GCP, .NET, WPF, RTOS, SPI, USB, 1G/10G Ethernet, FPGA, ASIC
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1w
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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2mo
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PD - Sr Staff - Physical Verification Lead | Signoff & DRC
Bay Area, California, United States
OnsiteFull Time
Eliyan
Eliyan: High-performance chiplet interconnect technology for artificial intelligence applications
15+ YOE15+ years ASIC physical verification experience; lead tapeouts; multi-foundry expertise across major nodes and packaging; strong DRC/LVS/DFM background; PV automation and signoff leadership.
Calibre, IC Validator, Python, Perl, Tcl, GDSII
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Principal SoC Architect
Walnut Creek, California, United States
$168k-$300k/yr OnsiteFull Time
Aptiv
AptivNYSE: APTV: Engineers electrical architectures and safety software for vehicles.
12+ YOEBachelor's in EE/CE,12+ years ARM CPU SoC/ASIC architecture experience, Ethernet/PCIe and memory subsystem expertise, EM/thermal tradeoff and IP selection experience, scripting in Tcl/Perl/Python preferred.
Tcl, Perl, Python
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Senior/Principal R&D Digital Systems Security, Hybrid
Albuquerque or Livermore
$140k-$281k/yr HybridFull Time
Sandia National Laboratories
Sandia National Laboratories: Conducts science and engineering research for national security.
5+ YOEBachelor's plus 5 years relevant experience (or equivalent), ability to obtain DOE Q-level clearance, expertise in hardware/software security, formal methods, and familiarity with secure-system design and verification.
RocQ, Lean, C, C++, Java, Python, Rust, Assembly, ASIC, FPGA, NIST, CNSS
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Test & Debug Technician (Swing Shift)
Newark, California, United States
$27-$33/hr OnsiteFull Time
Unigen
Unigen: Manufactures custom memory, storage, and AI electronic hardware solutions.
2+ YOEAssociate's degree in engineering/electronics or equivalent, 2+ years SMT/PCBA experience, proficiency with debugging BGA/FPGA/ASIC circuits, familiarity with communication protocols and test equipment, and ability to perform failure analysis.
Oscilloscope, X-ray machine, Flying Probe (Takaya), Agilent 3070 ICT, Multimeter, LCR meter, RS-232, RS-485, I2C, SPI, SMBUS, JTAG, SWD, Boundary Scan
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