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48 asic engineer jobs at 26 companies in Vallejo, CA

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Distinguished Engineer, ASIC (CONTRACT)
Burlington or New York or San Francisco
HybridContract, Temporary
Butterfly Network
Butterfly NetworkNYSE: BFLY: Handheld whole-body ultrasound scanners powered by semiconductor technology.
8+ YOE8–12+ years in digital IC/ASIC/SoC design; strong RTL SystemVerilog; tapeout experience; cross-functional collaboration.
SystemVerilog, Verilog, RTL, ASIC, SoC, clock_domain, PPA tools
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3mo
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Sr. Staff ASIC Verification Engineer
Palo Alto, California, United States
$237k-$296k/yr OnsiteFull Time
Rivian
RivianNASDAQ: RIVN: Designs and manufactures electric vehicles and charging networks.
10+ YOETypically 10+ years in ASIC design verification; BS/MS or PhD in Electrical or Computer Engineering; deep computer architecture; NoC; UPF/CPF; Systolic Arrays/NPUs; CNN/Transformer mapping; compilers/toolchains.
SystemVerilog, UVM, SVA, ISO 26262, FIA, Emulation, FPGA
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ASIC Design Engineer - Cache Controller
Santa Clara or San Francisco Bay Area
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
3+ YOE3+ years ASIC design experience; memory system development; RTL/micro-architecture; PPA analysis; B.S. in a related field.
RTL, HDL, Timing analysis, PPA analysis
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3mo
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ASIC Validation Engineer
Bay Area, California, United States
$168k-$297k/yr RemoteFull Time
Block
BlockNYSE: XYZ: Creates financial tools for businesses and individuals.
4+ YOEBachelor's in Electrical Engineering; 4+ years in silicon/hardware validation; lab experience; scripting (Python); cross-functional collaboration.
Python, lab equipment, oscilloscopes, logic analyzers, power supplies, SPI, I2C, JTAG, UART
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2mo
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Lead ASIC/FPGA Design Engineer
Livermore, California, United States
OnsiteFull Time
Aalyria
Aalyria: Provides laser communications and networking platforms for aerospace.
5+ YOELead RTL design of high-speed ASIC/FPGA modem; strong DSP, FEC integration, and power/performance optimizations; requires security clearance.
Verilog, SystemVerilog, LINT, CDC, RDC, Test benche s, Synthesis, Power/Area analysis, STA, Place and Route
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2mo
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ASIC Diagnostic & Silicon Bring-Up Engineer
Saratoga, California, United States
$180k-$250k/yr OnsiteFull Time
Eridu AI
Eridu AI: Develops semiconductor systems to accelerate AI infrastructure performance.
10+ YOE10+ years in ASIC bring-up/post-silicon validation; strong Python; hardware-software debug; experience with SERDES, PCIe, UCIe preferred.
Python, C++, Scripting, Diagnostics, Test Orchestration
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2mo
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Software Engineer, ASIC
Austin or South San Francisco
$123k-$216k/yr OnsiteFull Time
Neuralink
Neuralink: Developing implantable brain-computer interfaces to restore human capabilities.
Bachelor's degree in computer science or related field; experience with EDA compute environments; proficiency in Rust/Go/C++; Linux storage and datacenter systems; multi-cloud/hybrid deployments; embedded cross-compilation toolchains.
Rust, Python, Go, Cadence, Terraform, Ansible, Packer, MAAS, Bazel, Nix, Prometheus, ClickHouse, Grafana, Ray, Docker, Kubernetes, AWS, OCI, RHEL, Ubuntu
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6d
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Sr. ASIC Design Verification Engineer (Silicon Engineering)
Palo Alto, California, United States
$175k-$280k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
5+ YOEBachelor’s in EE/CE,5+ years design verification experience, proficiency with UVM/OVM/VMM, strong OOP and scripting (Python), RTL verification, ability to work extended hours.
UVM, OVM, VMM, Python
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2mo
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ASIC Test Technician
Menlo Park, California, United States
$80k-$120k/yr OnsiteFull Time
AttoTude
AttoTude: Developing terahertz-based interconnect solutions for AI data centers.
5+ YOE5+ years in wafer probe stations, associate degree in electronics or related field, perform wafer-level testing, calibration methods SOLT/TRL, cleanroom experience, precision procedures.
wafer probe stations, microscopes, calibration equipment, S-parameter measurement equipment, RF probes
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3w
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Production Systems Engineer, AI Systems
Menlo Park, California, United States
$173k-$245k/yr OnsiteFull Time
Meta
MetaNASDAQ: META: Develops social networking platforms and virtual reality technologies.
8+ YOEBachelor's in CS/CE or equivalent; 8+ years engineering experience in software/firmware/hardware for AI silicon/GPUs/TPUs/AI servers; experience in ASIC/board-level/firmware/system validation and hardware fault management.
AI silicon, GPUs, TPUs, ASIC, NICs, DPU, TCP/IP, iperf, uperf, RDMA, RoCE
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2mo
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Senior DFT Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
E-Space
E-Space: Builds sustainable LEO satellite networks for global IoT connectivity
8+ YOESenior DFT Engineer with 8+ years in design-for-test for complex digital ASICs/SoCs; expertise with DFT tools; RTL/ASIC test optimization.
Verilog, SystemVerilog, UVM, VHDL, Tcl, Python, Perl, Synopsys DFT Compiler, Tessent, DFTMAX, MBIST, JTAG, ATPG
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1w
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Hardware Engineer - FPGA
Milpitas or San Francisco
$152k-$222k/yr OnsiteFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
7+ YOEExperienced FPGA/ASIC engineer with RTL (Verilog/SystemVerilog) skills, FPGA tool experience, 7+ years (BS) or 4+ years (MS), verification experience (UVM/VMM) preferred.
Verilog, SystemVerilog, UVM, VMM
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3w
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Manufacturing Engineer, Advanced
Santa Rosa, California, United States
$101k-$168k/yr OnsiteFull Time
Keysight Technologies
Keysight TechnologiesNYSE: KEYS: Provides electronic design, test, and simulation software and hardware.
7+ YOEBSEE or MSEE; 7+ years manufacturing engineering experience with high-speed electrical components; CPI/Lean and Six Sigma experience; ASIC failure analysis; strong RF fundamentals.
Continuous Process Improvement (CPI), Lean, Six Sigma
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3w
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AI Silicon, Digital Design Engineer
Palo Alto, California, United States
OnsiteFull Time
Unconventional
Unconventional: Developing novel computing hardware for efficient AI acceleration.
8+ YOEB.S. or M.S. in EE/Computer Engineering, 8+ years ASIC/SoC digital design experience, Verilog RTL expertise, EDA tool proficiency, synthesis/timing/LEC experience, and mentorship/communication skills.
Verilog, RTL, EDA tools, Logical Equivalence Checking (LEC), Clock Domain Crossing (CDC), Reset Domain Crossing (RDC)
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2w
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RTL Design Engineer
New York City or Palo Alto or London
$205k-$285k/yr HybridFull Time
Normal Computing
Normal Computing: Building probabilistic AI and thermodynamic computing for semiconductor design.
Production SystemVerilog RTL experience, verification with UVM/cocotb/formal, taped-out silicon, ASIC/SoC design background, simulation and timing collaboration experience.
SystemVerilog, UVM, cocotb, formal, Chipyard, OpenTitan, CVA6, RISC-V
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3mo
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Power Infrastructure Engineer
Santa Clara or Berkeley or Austin or Bengaluru or Hsinchu
$206k-$251k/yr OnsiteFull Time
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
5+ YOEMS or PhD in Computer Science or Computer Architecture; 5+ years in power benchmarking, analysis, and modeling; experience with ASIC power analysis; hardware/software integration; ability to balance performance and power.
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1w
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IC Design Engineer
Berkeley, California, United States
$111k-$223k/yr OnsiteFull Time
Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory: Conducts scientific research to address global challenges.
2+ YOEDesign and develop high-performance analog/mixed-signal ASICs, perform block design, layout, verification, test and chip integration; collaborate with scientific teams; proficiency with IC design suites and simulators.
Cadence, Spectre, Eldo, HSPICE, FPGA, Verilog, VHDL, PDK
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1w
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IC Design Engineer
Berkeley, California, United States
$125k-$182k/yr OnsiteFull Time
Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory: Conducts multidisciplinary scientific research for the U.S. Department of Energy.
2+ YOE2+ years IC design experience (Level 2) or equivalent advanced degree; strong analog/mixed-signal design skills; proficiency with Cadence and transistor-level simulators; ability to design, test, and integrate ASICs for scientific instruments.
Cadence, Spectre, Eldo, HSPICE, Verilog, VHDL, FPGA, PDK
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1w
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Research Engineer, Chip Design RL (Reinforcement Learning)
San Francisco or New York City
$500k-$850k/yr HybridFull Time
Anthropic
Anthropic: Developing safe and reliable artificial intelligence systems.
Bachelor's or equivalent, expertise in ASIC/FPGA design and EDA tools, experience with RTL, verification (UVM, formal methods), physical design and tapeout experience; RL experience and tooling experience preferred.
EDA tools, UVM, formal methods, place-and-route
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2mo
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Networking Operating System Firmware Engineer
San Francisco, California, United States
$266k-$445k/yr HybridFull Time
OpenAI
OpenAI: Develops artificial intelligence models and generative AI software services.
Networking OS firmware, NOS images, Linux kernel, switch ASICs, SAI; strong C/C++, Python, Go or Rust; experience with NOS stacks (SONiC, FRR) and OpenAI-scale infrastructure.
SONiC, FRR, Linux, SAI, ASIC_SDK, C/C++, Python, Go, Rust
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