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36 asic engineer jobs at 13 companies in Salem, OR

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Senior ASIC Verification Engineer
Durham or Madison or Hillsboro
$136k-$265k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEBachelor's or Master's in EE/CS/CE (or equivalent), 5+ years ASIC verification experience, strong SystemVerilog and C/C++ skills, UVM, constrained-random and coverage-driven verification, familiarity with VCS/IES and debug tools.
SystemVerilog, C, C++, Universal Verification Methodology (UVM), VCS, IES, Debussy, GDB, Semiformal Verification (SFV), Perl, Python
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2d
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ASIC Design and Integration Engineer
Beaverton, Oregon, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Highly skilled ASIC design engineer developing custom SoCs and collaborating with cross-functional teams to deliver advanced technology solutions.
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1w
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Analog ASIC Design Engineer
Boulder or Beaverton
$149k-$277k/yr OnsiteFull Time
Ralliant Corporation
Ralliant CorporationNYSE: RAL: Global provider of precision instruments, sensors, and monitoring solutions.
5+ YOEBSEE/MSEE and 5+ years analog/mixed-signal IC design experience, proficiency with ASIC design tools, layout and RF analysis, strong communication, willingness to travel domestically, must be a U.S. Person.
Ansys HFSS, Cadence EMX
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Analog ASIC Design Engineer
Boulder or Louisville or Beaverton
HybridFull Time
Ralliant
RalliantNew York Stock Exchange: RAL: Sells precision instruments and sensors for diverse industrial sectors.
5+ YOEBSEE or MSEE in EE, 5+ years analog/mixed‑signal IC design experience, ASIC design and verification tool proficiency, RF and layout experience, lab characterization, strong communication and collaboration skills.
Ansys HFSS, Cadence EMX
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Senior ASIC Verification Engineer
Durham or Madison or Hillsboro
$136k-$265k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOEBachelors/Masters in EE/CS/CE or equivalent, 5+ years verification experience, strong SystemVerilog and C/C++ skills, verification methodology experience (UVM, constrained-random, coverage, assertions), familiarity with VCS/IES and debug tools.
SystemVerilog, C, C++, VCS, IES, Debussy, GDB, Universal Verification Methodology (UVM), Semiformal Verification (SFV), Perl, Python
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ASIC Physical Design Lead
Columbus or Fayetteville or Portland or Dayton
HybridFull Time
Niobium Microsystems
Niobium Microsystems: Develops hardware accelerators for fully homomorphic encryption and secure computing.
8+ YOE8+ years ASIC physical design experience with multiple tapeouts, advanced-node PnR, floorplanning, CTS, STA/timing closure, UPF/CPF low-power flows, and strong cross-functional communication.
Cadence, Synopsys, GDSII, UPF, CPF
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EDA Tools SW Engineer
Hillsboro or Santa Clara or Austin or Phoenix
$174k-$330k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
6+ YOEBS+10/ MS+8/ PhD+6 in Electrical/Computer Engineering or related,6+ years relevant experience, technical leadership, foundry/process/ASIC physical design and verification knowledge.
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Implant Software Staff Engineer (62275)
Lake Oswego, Oregon, United States
OnsiteFull Time
BIOTRONIK
BIOTRONIK: Manufactures cardiovascular and endovascular medical devices for patient therapy.
8+ YOE8+ years embedded software experience, BS/MS in engineering, experience with 8-bit microcontrollers, C and assembly, medical device/regulatory experience, strong communication and problem-solving.
C, Assembly, RTOS, ASIC
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Principal Logic Design Engineer
Hillsboro, Oregon, United States
$127k-$237k/yr HybridFull Time
Rambus
RambusNASDAQ: RMBS: Develops high-performance memory interface chips and semiconductor IP.
8+ YOEExpertise in System Verilog/Verilog RTL, simulator experience (Questa/Incisive/VCS), scripting (Python/Perl/TCL), 8+–10+ years ASIC/FPGA logic design experience, strong communication and project management skills.
System Verilog, Verilog, Questa, Incisive, VCS, Python, Perl, TCL, UVM, AMBA AXI, CHI
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Product Engineer - Tessent Design for Test (DFT)
Wilsonville, Oregon, United States
$35-$64/hr HybridFull Time
Siemens
SiemensXETRA: SIE: Manufactures industrial automation, infrastructure, and energy technology systems.
1+ YOEBachelors in EE/CS/CE required, 1+ years DFT or ASIC experience preferred. Proficiency in Linux/Windows and scripting (TCL or Python). Strong problem-solving, communication, and ability to work as an individual contributor. Some domestic and international travel.
Linux, Microsoft Windows, TCL, Python, Tessent, Verilog, SystemVerilog, VHDL, ATPG, IEEE 1687
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3w
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Field Applications Engineering
San Jose or Hillsboro
FieldFull Time
Lattice Semiconductor
Lattice SemiconductorNASDAQ: LSCC: Designs and sells low-power programmable logic devices and chips.
7+ YOE7+ years FPGA/ASIC design experience with VHDL/Verilog/SystemVerilog and tools like Radiant, Diamond, Quartus, or Vivado; Bachelor's in Electrical Engineering; strong presentation and customer-facing skills; available to travel periodically.
VHDL, Verilog, SystemVerilog, Radiant, Diamond, Quartus, Vivado
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Senior Director Power Architecture, Datacenter AI
San Diego or Austin or Hillsboro or Santa Clara
$250k-$376k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
10+ YOERequires a science, engineering, or related degree and 8–10+ years of ASIC experience; preferred 12–15+ years in SoC power and performance analysis with C/C++ and Python skills.
C, C++, Python
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6d
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Principal Firmware Architect
Redmond or Mountain View or Austin or Hillsboro
$143k-$275k/yr HybridFull Time
Microsoft
MicrosoftNASDAQ: MSFT: Develops software, services, devices, and cloud computing solutions.
3+ YOERequires a degree in engineering or computer science and 3–8+ years of technical engineering experience depending on degree; preferred embedded software, firmware architecture, hardware interfaces, and security experience.
PCIe, I2C, eMMC, SPI, USB, UART, BMC, ASIC, SoC
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FPGA Engineering Manager (Nextest, Tualatin, OR)
Tualatin, Oregon, United States
$171k-$274k/yr OnsiteFull Time
Teradyne
TeradyneNASDAQ: TER: Designs and manufactures automated test equipment and advanced robotics systems.
12+ YOE5+ MgmtB.S./M.S. in EE,12+ years digital ASIC/FPGA design,5+ years project lead,verilog/RTL,Cadence and static timing tools,PCIe/DDR/AXI/SERDES experience,excellent communication and presentation skills.
verilog, RTL, Cadence, Vivado, Quartus, UVM, Linux, Windows, PCIe, DDR3, DDR4, DDR5, AXI, Ethernet, SPI, SERDES, Lint, CDC, ATE
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Technical Director - Digital IC Design
San Jose or Hillsboro
$170k-$340k/yr OnsiteFull Time
Skyworks Solutions
Skyworks SolutionsNASDAQ: SWKS: Designs and manufactures analog and mixed-signal semiconductor solutions.
12+ YOEBachelor's in EE/CE required (Master's/PhD preferred), 12+ years in digital IC design with hardware DSP focus, proven ASIC/SoC delivery, team leadership, RTL (Verilog/SystemVerilog/SystemC), synthesis/timing/simulation, FPGA prototyping, low-power and physical design expertise.
Verilog, SystemVerilog, SystemC, JasperGold
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